Receiver with a frequency offset correcting function

Details Receiver with a frequency offset correcting function Receiver with a frequency offset correcting function

1998-11-04

2002-02-12

Ghayour, Mohammad H. (Department: 2634)

Pulse or digital communications

Receivers

Automatic frequency control

C375S326000, C455S139000, C455S184100, C455S185100

Reexamination Certificate

active

06347126

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a receiver with a frequency offset correcting function used for radio digital data transfer such as that for an automobile telephone.
BACKGROUND ART
Prior to description of the prior art, description is made for a technological background concerning the present invention.
FIG. 14
shows a model of a channel with intersymbol interference (ISI) therein.
The model expresses a channel with a finite impulse response (FIR) filter. In the model, a received signal is a synthesized signal synthesized from a lead signal with the output thereof directly received and a delay signal with the output thereof received with a delay due to its reflection or so.
In the figure, a time difference between delay signals is given by a delay circuit DELAY comprising L-segmented shift register. The lead signal is obtained by multiplying a transmitted signal I
n
by channel impulse response (CIR) c
0,n
as a tap coefficient with a multiplier MULT
0
. Herein, a subscript n of CIR c
0,n
indicates a time of data received during TDMA communications.
Also, delay signals are obtained by multiplying delayed transmitted signals I
n−1
to I
n−L
by tap coefficients c
1, n
to c
L,n
with multipliers MULT
1
to L respectively. Then, outputs of delay signals from the multipliers MULT
0
to L are summed up by a summing device SUM, and an adder (ADD) adds noise W
n
to the summed wave outputted from the summing device (SUM) to output the added wave as a received signal r
n
.
When intersymbol interference (ISI) is not present in the channel, the received signal r
n
is expressed with the following equation.
r
n
=c
0,n
I
n
+W
n
  (1)
In this case, c
0, n
is a known value, so that a transmitted signal I
n
can easily be estimated from a received signal r
n
on condition that a noise W
n
is small.
By the way, according to the model in
FIG. 14
, when a transmitted sequence of {I
n
} is transmitted to the channel, this transmitted sequence undergoes intersymbol interference (ISI) in addition to additive white Gaussian noise W
n
in the channel. Accordingly, the received signal r
n
includes not only a time n but also a transmitting sequence I
n
in the past before that time. The received signal at this time is expressed with the following equation:
 
r
n
=&Sgr;c
i,n
I
n−i
+W
n
  (2)
wherein the sum &Sgr; is obtained for values of i=0, . . . , L, and L indicates a time length affected by intersymbol interference (ISI), namely a channel memory length.
In the model of the channel shown in
FIG. 14
, the transmitted sequence I
n
includes a range from time n to time (n−L). An equalizer is often used for the channel described above as a device for estimating a transmitted sequence I
n
from a received signal r
n
.
Also, when there is frequency offset &Dgr;&ohgr; generated due to a difference between a local oscillator of a transmitter and a local oscillator of a receiver, a received signal is expressed with the following equation:
r
n
=&Sgr;c
i,n
I
n−i
exp (&Dgr;&ohgr;
n+&thgr;
0
)+
W′
n
  (3)
wherein &thgr;
0
is an initial phase, and W′
n
is expressed with the following equation:
W′
n
=W
n
exp (&Dgr;&ohgr;
n+&thgr;
0
)  (4)
As described above, the performance of a receiver is deteriorated due to distortion caused by frequency offset &Dgr;&ohgr; in addition to intersymbol interference (ISI). And for this reason, the receiver needs to correct the intersymbol interference (ISI) and also the distortion caused by frequency offset &Dgr;&ohgr;.
Next description is made for an example of a receiver with a frequency offset correcting function based on the conventional technology.
FIG. 15
is a block diagram showing the conventional type of receiver for correcting frequency offset. The receiver in this example is the same as that described in “Method and Device for Compensating Carrier Frequency Offset in TDMA Communication System (Japanese Patent Laid-open Publication No. HEI 6-508244)” disclosed by Lin Yuphan et al.
In
FIG. 15
, designated at the reference numeral
211
is a CIR estimating circuit for estimating CIR according to a training sequence in a received signal, at
212
a phase deviation detecting circuit for computing a phase deviation according to the CIR estimated value estimated by the CIR estimating circuit
211
and a tail bit described later of the received signal, at
213
an averaging circuit for averaging the phase deviations outputted from the phase deviation detecting circuit
212
and computing a frequency offset estimated value, at
214
a frequency offset correcting circuit for correcting the received signal r
n
according to the frequency offset estimated value outputted from the averaging circuit
213
, and at
215
an equalizer for equalizing the received signal r′
n
corrected by the frequency offset correcting circuit
214
according to the CIR estimated value outputted from the CIR estimating circuit
211
, andestimating the transmitted data sequence.
FIG. 16
shows a burst B
1
of received signals received during TDMA communications based on the conventional technology shown in FIG.
15
.
In the figure, this burst B
1
comprises a training sequence B
11
, data sequence B
12
, B
13
, and tail bits B
14
, B
15
, and the training sequence B
11
and the tail bits B
14
, B
15
are known in the receiver side.
Next description is made for operations in the example based on the conventional technology with reference to FIG.
15
and FIG.
16
.
At first, the CIR estimating circuit
211
computes, when having received a received signal r
n
, CIR estimated values g
0
, g
1
, . . . , g
L
according to the training sequence B
11
in the received burst B
1
as shown in
FIG. 16
as well as to the training sequence having previously been known in the receiver side.
Then, the phase deviation detecting circuit
212
first computes a phase deviation &phgr;
m
with the following equation according to the CIR estimated values g
0
, g
1
, . . . , g
L
estimated with the known training sequence in the received burst B
1
by the CIR estimating circuit
211
as well as to the known tail bits I
n−L
, I
n−L+1
, . . . , I
n
. It should be noted that a subscript m in the equation indicates a phase deviation in m-th received burst.
s
n
=&Sgr;g
i
I
n−i
  (5)
&phgr;
m
={Im[r
n
]·Re[s
n
]−Im[s
n
]·Re[r
n
]}/{ABS[r
n
]·ABS[s
n
]}  (6)
wherein the sum &Sgr; is obtained for i=0, . . . , L. It should be noted that L indicates, as shown in the channel model in
FIG. 14
, a time length affected by intersymbol interference (ISI), namely a channel memory length, and corresponds to the number of stages in the delay circuit DELAY. Also, in the equation, designated at the reference sign s
n
is a replica (estimated value) of a received signal, at Re[a] a real part of a complex number a, at Im[a] an imaginary part of the complex number a, and at ABS[a] an absolute value of the complex number a respectively.
Further, the phase deviation detecting circuit
212
computes a phase deviation per symbol &Dgr;&phgr;
m
through the following equation according to the phase deviation &phgr;
m
as described above, and outputs a result of the computing to the averaging circuit
213
.
&Dgr;&phgr;
m
=&phgr;
m
{2/(
M−
1)}  (7)
wherein M indicates a total number of symbols of a received burst B
1
.
Then, the averaging circuit
213
averages the phase deviation per symbol &Dgr;&phgr;
m
estimated for each burst B
1
, and outputs a result of averaging to the frequency offset correcting circuit
214
as a frequency-offset estimated value &Dgr;&ohgr;
m
.
The frequency offset correcting circuit
214
corrects frequency offset of a received signal r
n
through the following equation according to the frequency-offset estimated value &D

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