Pulse or digital communications – Systems using alternating or pulsating current – Plural channels for transmission of a single pulse train
Reexamination Certificate
1998-06-24
2001-06-05
Pham, Chi (Department: 2631)
Pulse or digital communications
Systems using alternating or pulsating current
Plural channels for transmission of a single pulse train
C375S341000, C375S284000, C375S298000
Reexamination Certificate
active
06243423
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a receiver, a transmitter-receiver, and a communication method, and is suitably applied to, for example, a radio communication system such as a portable telephone system.
2. Description of the Related Art
In a radio communication system, including so-called cellular system, an area for providing communication services is divided into cells of prescribed sizes: in each of the cells a base station as a fixed radio station is located, and a portable telephone serving as a mobile radio station radio-communicates with the base station in the cell in which the telephone exists. Various systems are proposed for the communication systems between a portable telephone and a base station, and a typical one is a time division multiple connection system referred to as a time division multiple access (TDMA) system.
As shown in
FIGS. 1A and 1B
, for example, in the TDMA system, a predetermined frequency channel is temporally partitioned into frames F
0
, F
1
, etc. of a predetermined time width, each of the frames is divided into time slots TS
0
to TS
3
of a predetermined time width, and a transmission signal is transmitted by using the frequency channel for the timing of the time slot TS
0
assigned to the local station. A system of plural communication (so-called multiplex communication) is realized by using the same frequency channel for the efficient use of frequencies. In the following description, the time slot TS
0
assigned for transmission is referred to as a transmission slot TX, and the data block (that is, information unit) to be transmitted by one transmission slot TX is referred to as a slot.
A transmitter and a receiver of a radio communication system for performing transmission and reception by using the TDMA system are described below with reference to
FIGS. 2 and 3
. The transmitter and the receiver, for example, as shown in
FIGS. 2 and 3
are mounted on a portable telephone and a base station of a portable telephone system, and used for the communication from the portable telephone to the base station (so-called up-link communication) and the communication from the base station to the portable telephone (so-called down-link communication).
As shown in
FIG. 2
, a transmitter
1
comprises a convolution coding circuit
2
, an interleaving buffer
3
, a slotting circuit
4
, a modulation circuit
5
, a pilot-symbol addition circuit
6
, a transmission circuit
7
and an antenna
8
. First, an information bit series S
1
serving as transmission data is inputted to the convolution coding circuit
2
.
The convolution coding circuit
2
, which comprises shift registers of a predetermined number of stages and exclusive OR circuits, applies convolution-coding to the inputted information bit series S
1
, and outputs the resulting coded bit series S
2
to the interleaving buffer
3
. The interleaving buffer
3
stores the coded bit series S
2
in its internal storage area successively. When the coded bit series S
2
are stored in the entire storage area (that is, when a desired volume of coded bit series S
2
is stored), the buffer
3
re-sequences the order in the coded bit series S
2
at random (the re-sequencing of the order is hereafter referred to as interleaving) and outputs coded bit series S
3
obtained by interleaving the coded bit series S
2
to the slotting circuit
4
. In this connection, the interleaving buffer
3
has a storage capacity for a plurality of slots so that coded bit series is dispersed to a plurality of transmission slots TX.
The slotting circuit
4
partitions the coded bit series S
3
for every predetermined number of bits so as to assign the coded bit series S
3
to the transmission slots TX and successively outputs coded bit groups S
4
obtained by assigning the coded bit series S
3
to the transmission slots TX to the modulation circuit
5
. The modulation circuit
5
applies predetermined modulation (e.g. synchronous-detection-based modulation such as QPSK) to each of supplied coded bit groups S
4
and outputs the resulting information symbol groups S
5
to the pilot symbol addition circuit
6
.
As shown in
FIG. 4
, the pilot symbol addition circuit
6
adds pilot symbols P to the head position of each symbol group (that is, the head of information symbols I) of the information symbol groups S
5
partitioned correspondingly to the transmission slots TX as headers and outputs the resulting transmission symbol groups S
6
to the transmission circuit
7
. In this connection, the pilot symbols P added in this case are symbols of patterns previously known to the receiver side, and the receiver side estimates transmission-line characteristics (e.g. the state of fading) in accordance with the pilot symbols P.
The transmission circuit
7
applies filtering to the pilot-symbol-added transmission symbol groups S
6
in sequence and applies digital-analog conversion to the resulting groups S
6
to generate a transmission signal. Then, the transmission circuit
7
generates a transmission signal S
7
of a predetermined frequency channel by applying frequency conversion to the transmission signal, amplifies the signal S
7
up to predetermined power, and transmits the signal S
7
via the antenna
8
. Thus, the transmission signal S
7
is transmitted from the transmitter
1
synchronously with the timing of the transmission slots TX.
As shown in
FIG. 3
, a receiver
10
comprises an antenna
11
, a reception circuit
12
, a transmission line estimation circuit
13
, a demodulation circuit
14
, a slot connection circuit
15
, a deinterleaving buffer
16
, and a Viterbi decoding circuit
17
. The receiver
10
receives the transmission signal S
7
transmitted from the transmitter
1
via the antenna
11
and inputs the signal S
7
to the reception circuit
12
as a reception signal S
11
. The reception circuit
12
amplifies the input reception signal S
11
and fetches a base band signal by applying frequency conversion to the reception signal S
11
. Then, the circuit
12
applies filtering to the base band signal, obtains reception symbol groups S
12
corresponding to the above transmission symbol groups S
6
by applying analog-digital conversion to the base band signal, and outputs the groups S
12
to the transmission line estimation circuit
13
.
The transmission line estimation circuit
13
, which is a circuit for examining characteristics of a transmission line and performing equalization corresponding to the examination results, estimates characteristics of a transmission line by referring to the pilot symbols P in the reception symbol groups S
13
and calculates inverse characteristics of the transmission line in accordance with the estimation result. Moreover, the transmission line estimation circuit
13
convolution-multiplies respective information symbol portions of the reception symbol groups S
12
in a time domain by the values of the inverse characteristics of the transmission line by using an equivalent circuit comprising an equalizer so as to eliminate such influence as fading caused in the transmission line. According to this processing, the transmission line estimation circuit
13
restores the transmitted information symbol groups S
5
and outputs them to the demodulation circuit
14
as the reception information symbol groups S
13
.
The demodulation circuit
14
restores coded bit groups S
14
corresponding to the coded bit groups S
4
in the transmission side by applying predetermined demodulation to the reception information symbol groups S
13
and outputs the groups S
14
to the slot connection circuit
15
. In this connection, each bit of the coded bit group S
14
is not a binary signal having a value of 0 or 1 but a multi-valued signal due to noise components added in the transmission line. The slot connection circuit
15
is a circuit for connecting the coded bit groups S
14
fragmentarily obtained in slots one another to make a continuous signal. The circuit
15
connects the coded bit groups S
14
when they are accumulated up to the storage capac
Sakoda Kazuyuki
Suzuki Mitsuhiro
Maioli Jay H.
Pham Chi
Phu Phuong
Sony Corporation
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