Telecommunications – Receiver or analog modulated signal frequency converter – Measuring or testing of receiver
Reexamination Certificate
2000-07-12
2004-11-30
Corsaro, Nick (Department: 2684)
Telecommunications
Receiver or analog modulated signal frequency converter
Measuring or testing of receiver
C455S334000, C455S280000, C375S346000, C375S355000
Reexamination Certificate
active
06826390
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a signal transmission technology and, more particularly, to a receiver, a transceiver circuit, a signal transmission method, and a signal transmission system for performing high-speed signal transmission between LSI chips or between a plurality of devices or circuit blocks accommodated on the same chip, or between boards or enclosures.
2. Description of the Related Art
In recent years, the performance of components used to construct computers and other information processing apparatuses has improved greatly; for example, performance improvements for semiconductor memory devices such as DRAM (Dynamic Random Access Memory) and processors and the like have been remarkable. The improvements in the performance of semiconductor memory devices, processors, etc. have come to the point where system performance cannot be improved further unless the speed of signal transmission between components or elements is increased.
For example, the speed of signal transmission between a main storage device such as a DRAM and a processor is becoming a bottleneck impeding performance improvement for a computer as a whole. The need for the improvement of signal transmission speed is increasing not only for signal transmission between enclosures or boards (printed wiring boards), such as between a server and a main storage device or between servers connected via a network, but also for signal transmission between. LSI (Large Scale Integration) chips or between devices or circuit blocks accommodated on the same chip because of increasing integration and increasing size of semiconductor chips, decreasing supply voltage levels (signal amplitude levels), etc.
Specifically, there is a need to increase the signal transmission speed per pin in order to address the increase in the amount of data transmission between LSIs or between boards or enclosures. This is to avoid an increase in package cost, etc. due to increased pin count. As a result, the inter-LSI signal transmission rate in recent years has exceeded 1 Gbps, and in the future (three to eight years from now) it is expected to reach an extremely high value (very high signal transmission rate) such as 4 Gbps or even 10 Gbps.
It is thus desired to provide a transceiver circuit that can evaluate and diagnose signal transmission systems, optimize transmission/reception parameters, and achieve increased receiver sensitivity, and also a receiver that can eliminate a large common mode voltage in a circuit used for signal transmission.
For signal transmission between boards or enclosures, between LSI chips, or between a plurality of devices or circuit blocks accommodated on the same chip, there is a need to increase the efficiency of use of a transmission line by reducing the number of signal lines, wiring patterns, etc. and, in view of this, it is also desired to provide a signal transmission system, a signal transmission method, and a transceiver circuit capable of providing higher-accuracy and higher-speed signal transmission in both directions.
The prior art and its associated problem will be described in detail, later, with reference to the accompanying drawings.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a transceiver circuit that can evaluate and diagnose signal transmission systems, optimize transmission/reception parameters, and enhance receiver sensitivity. It is also an object of the present invention to provide a receiver that can eliminate a large common mode voltage in a circuit used for signal transmission.
A second object of the present invention is to provide a receiver capable of achieving higher-accuracy and higher-speed signal transmission by allowing a large timing margin for the operation of a decision circuit.
A third object of the present invention is to provide a signal transmission system, a signal transmission method, and a transceiver circuit that can achieve more efficient utilization of the signal transmission line and accurately perform high-speed signal transmission using fewer signal lines, and that can extend the maximum signal line length.
According to the present invention, there is provided a receiver comprising an offset application circuit for applying a known offset to an input signal; and a decision circuit for comparing the offset-applied input signal with a reference voltage, wherein the level of the input signal is determined based on the known offset and on a result output from the decision circuit.
The offset application circuit may include an offset level control circuit for controlling the level of the offset by a digital signal. The receiver may further comprise an input signal level detection circuit for detecting the level of the input signal by increasing or decreasing the level of the offset using the offset level control circuit, and by finding an offset level where the result output from the decision circuit changes. The receiver may further comprise a timing control circuit for controlling decision timing in the decision circuit in such a manner as to vary the decision timing relative to an internal clock in the receiver, and wherein the level of the offset is adjusted by judging an externally supplied, predetermined test pattern at output timing of the timing control circuit, and information concerning the input signal is acquired using the input signal level detection circuit.
The offset voltage application circuit may pass a constant current to a termination resistor provided in parallel to an input terminal of the receiver. The offset voltage application circuit may include a plurality of capacitors and switches, and vary the level of the offset by varying a precharge voltage of each of the capacitors. The offset voltage application circuit varies the level of the offset by passing a constant current into an internal node in the receiver. The offset voltage application circuit varies the level of the offset by passing a constant current into an internal node in the receiver. The received signal quality of the input signal may be diagnosed, or a characteristic of the receiver or driver may be adjusted, by using the waveform of the input signal obtained from the known offset and the result output from the decision circuit.
Further, according to the present invention, there is provided a transceiver circuit having a receiver for receiving a signal input thereto, and a driver for outputting a signal, wherein the receiver comprises an offset application circuit for applying a known offset to the input signal; and a decision circuit for comparing the offset-applied input signal with a reference voltage, wherein the level of the input signal is determined based on the known offset and on a result output from the decision circuit.
According to the present invention, there is also provided a signal transmission system having a first transceiver circuit, a second transceiver circuit, and a signal transmission line connecting between the first and second transceiver circuits, wherein each of the transceiver circuits comprises a receiver for receiving a signal input thereto, and a driver for outputting a signal; and the receiver includes an offset application circuit for applying a known offset to the input signal and a decision circuit for comparing the offset-applied input signal with a reference voltage, wherein the level of the input signal is determined based on the known offset and on a result output from the decision circuit.
A predetermined test pattern may be transmitted from the driver in the first transceiver circuit, the test pattern may be judged at predetermined timing using the receiver in the second transceiver circuit; and the level of the test pattern may be detected by adjusting the level of the offset in the second transceiver circuit, thereby adjusting an equalization parameter of the receiver in the second transceiver circuit. A boundary signal which should be judged to be at a boundary between data “0” and “1” may be transmitted to the receiver in the second transceiv
Arent & Fox PLLC
Corsaro Nick
Trinh Tan
LandOfFree
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