Receiver, programmable circuit and method of calculating...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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06952709

ABSTRACT:
The invention offers a method of calculating digital filters enabling to multiplex various different filters with the aid of a programmable co-processor circuit comprising a calculation element and memory registers. The invention comprises making an anticipated calculation of part of the result of the current filter before the last data included in the calculation of this result has arrived. For this purpose, successive products between predetermined filter coefficients and the corresponding input data which have already been used for the calculation of the preceding results are accumulated in an iterative fashion in an intermediate result in order to anticipate the calculation of the current result. The calculation of the last intermediate result for each final result is triggered each time a new input data is received, so that each filter result is immediately available once the last input data involved in this result has been received.

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patent: WO9806064 (1998-02-01), None
“Reconfigurable Hardware for Efficient Implementation of Programmable Fir Filters”, Tracy C. Denk et al, published in ISCASSP, May 1998.

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