Receiver having integrated mixer and Sigma-Delta analog-to...

Pulse or digital communications – Pulse code modulation – Differential

Reexamination Certificate

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Details

C375S316000, C341S143000

Reexamination Certificate

active

06584157

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a receiver comprising: a mixer for mixing an oscillator signal with a carrier signal modulated by an information signal, and an analog-to-digital converter for converting the information signal to a digital signal.
2. Description of Related Art
FIG. 1
shows a block diagram of a conventional superheterodyne receiver. By way of example a receiver for a GSM (Global System for Mobile communication) telephone is shown. However, similar techniques are used in, for example paging or radio receivers. The radio frequency (RF) signal is first mixed to an intermediate frequency (IF) using a first local oscillator signal LO
1
. After that the information signals I and Q are separately mixed down to baseband signals using two mixers MX
2
A and MX
2
B and second local oscillator signals LO
2
A and LO
2
B which have a phase difference of 90 degrees. After passing an anti-aliasing lowpass filter LPF the information signals are converted to the digital domain by means of analog-to-digital (A/D) converters. In this conventional receiver the mixing-down to baseband signal and the conversion of the baseband signal to a digital signal requires a mixer, a lowpass filter and an A/D converter. Such a solution has a drawback that it is costly because of the relatively expensive passive filter used in the superheterodyne receivers.
It is an object of the invention to mitigate the drawbacks of the conventional receiver. To this end the receiver as specified in the opening paragraph is characterised in that the analog-to-digital converter is a sigma-delta converter comprising: an input stage for coupling the information signal to an input of a continuous-time loopfilter, a quantizer for quantizing an output signal of the loopfilter and for generating the digital signal, and a digital-to-analog converter for feeding back the digital signal to the input of the loopfilter, the input stage comprising the mixer and having a first input for receiving the carrier signal, a second input for receiving the oscillator signal and an output coupled to the input of the loopfilter for providing the information signal to the loopfilter.
The approach according to the invention uses a mixer and a Sigma-Delta Modulator for A/D conversion without anti-aliasing lowpass filter. The output of the mixer is directly supplied to the loop filter of the Sigma-Delta Modulator. The use of a Sigma-Delta Modulator for converting an analog signal to a digital signal is known from, for example, an article by E. J. van der Zwan and E. C. Dijkmans: “A 0.2-mW CMOS Sigma-Delta Modulator for Speech Coding with 80 dB Dynamic Range”, IEEE Journal of Solid-State Circuits, Vol. 31, No. 12, December 1996. The principle of operation of the Sigma-Delta Modulator, as described in the referenced article, is that the information signal is fed to a feedback loop comprising a continuous-time analog filter, a sampler and a digital-to-analog converter (DAC). The output signal of the Sigma-Delta Modulator is a stream of bits at a highly oversampled rate. The oversampled bitstream is fed to subsequent digital processing which converts the bitstream to an accurate digitised representation of the information signal in a process known as decimation. The continuous-time analog loop filter used in the Sigma-Delta Modulator of the referenced article has good anti-aliasing characteristics. Therefore by employing the Sigma-Delta Modulator as an A/D converter in the aforementioned receiver, the lowpass filter between the mixer and the A/D converter can be omitted. This can lead to simple mixer/Sigma-Delta Modulator structures with less components, chip area and power consumption. Preferred and advantageous embodiments are defined in the dependent claims.
OBJECTS AND SUMMARY OF THE INVENTION


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E.J. van der Zwan et al, “A 0.2-mW CMOS Sigma-Delta Modulator for Speech Coding with 80 dB Dynamic Range”, IEEE Journal of Solid-State Circuits, vol. 31, No. 12, Dec. 1996.

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