Receiver for RF signals

Telecommunications – Receiver or analog modulated signal frequency converter – Noise or interference elimination

Reexamination Certificate

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Details

C455S324000, C455S334000

Reexamination Certificate

active

06298226

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to a method and apparatus for communicating information. More particularly, the invention relates to circuitry for the mixing and amplification of radio frequency signals.
BACKGROUND OF THE INVENTION
A receiver for a radio frequency signal is configurable to operate in various applications. For example, the receiver can be used in TV receivers or in receivers used in a radio communications system. The receivers in such radio communications systems are usually included in wireless phones and in transceiver stations. An exemplary radio communications system is a cellular system that is in accordance with a particular specification, such as “Global System for Mobile Communications” (GSM), “Advanced Mobile Phone System” (AMPS) or “Code Division Multiple Access” (CDMA).
An example of an RF receiver is a direct-conversion receiver in which the local signal has a frequency that is set to be the same as the frequency of the RF signal. In such a direct-conversion receiver, the intermediate frequency is zero and the mixer transforms the RF signal into the baseband.
The transformed signal in the baseband has typically a low power level and requires subsequent amplification. Thus, the direct-conversion receiver has a high gain for the signal in the baseband. Because of this high gain, any component of the baseband that is slightly offset from the frequency zero becomes critical for a satisfying operation of the direct-conversion receiver. Any component of the baseband which is offset at a frequency zero is subsequently generally referred to as “DC offset.” For instance, the DC offset may cause the direct-conversion receiver to become overloaded because the DC offset is also subject to the high gain and a final amplifier is driven into saturation. The DC offset may be caused by a mismatch of internal receiver components or frequency components that mix and produce products that fall into the baseband.
A direct-conversion receiver in a radio communication system is configured to have a varying gain in order to track the varying signal strength of the received RF signal. Because of this varying gain, the magnitude of the DC offset at the output of the mixer is constantly changing. Moreover, the varying gain complicates conventional methods to compensate for or cancel the DC offset. The faster the DC offset can be compensated or canceled, the sooner a cellular phone can receive good data. Particularly for radio communications systems that operate in time division duplex (TDD), the faster the DC offset can be corrected, the higher the TDD transmission rate. A high TDD transmission rate is desired, for example, because a high TDD rate improves voice quality in cellular phones by reducing the delay or echo that is typically canceled.
SUMMARY OF THE INVENTION
There is, therefore, a need to provide a circuitry that reduces the time to correct for DC offsets, particularly in direct-conversion receivers.
One aspect of the invention involves a hand-held communications device. The device includes a direct-conversion receiver for a radio frequency (RF) signal which is configured to receive the RF signal during time slots for reception defined in a TDD system. A first input receives the RF signal and a first output outputs a baseband signal derived from the RF signal. A mixer module is configured to receive the RF signal and a local signal which is generated by a local oscillator. The mixer module generates an output signal which includes the baseband signal and an offset component. An amplifier module is connected between the first output and the mixer module, and includes a feedback loop which has in a backward path a track-and-hold circuit. The track-and-hold circuit is configured to track the offset component during a first time slot for reception and to hold a value of the offset component at an end of the first time slot until a subsequent second time slot for reception begins. This held value is applied during the second time slot to the output signal in order to provide for fast compensation of the offset component.
Another aspect of the invention involves an electrical circuit. The circuit has a first input for receiving a communications signal comprising a baseband and an offset component, and a first output configured to output the baseband signal derived from the communications signal. An amplifier module is interconnected between the first input and the first output. The amplifier module comprises a feedback loop which includes a track-and-hold circuit within a backward path. The track-and-hold circuit is configured to track the offset component during a first period of time and to hold a value of the offset component at an end of the first period of time until a subsequent second period of time begins. The held value is applied during the second period of time to the communications signal in order to provide for fast compensation of the offset component.
Another aspect of the invention relates to an electrical circuit. The electrical circuit comprises a first input for receiving a communications signal comprising a baseband and an offset component. The electrical circuit also comprises an amplifier module which is in communication with the first input. The amplifier module comprises a feedback loop with a track-and-hold circuit. The track-and-hold circuit is configured to hold a compensation value and to compensate the offset component based on the compensation value.
In another embodiment, the track-and-hold circuit comprises a first amplifier stage having a second input which is configured to receive a signal derived from the baseband signal. A second amplifier stage has a third input and a capacitor is interposed between the first and second amplifier stages.
In yet another embodiment, the first amplifier stage includes a first subcircuit and a second subcircuit connected in parallel to the capacitor and the second input. The first subcircuit is configured to linearly modify a charge of the capacitor based on the value representing the offset component. The second subcircuit is configured to non-linearly modify the charge of the capacitor based on the value of the offset component.
In another embodiment, the first amplifier stage further comprises a third subcircuit which is connected to the capacitor. The third subcircuit is configured to modify a common-mode voltage of the capacitor.
Another aspect of the invention relates to a method for compensating an offset component. The method comprises the act of receiving a communications signal comprising a baseband and an offset component, holding in a feedback path during at least a first time period, a compensation value, and compensating during at least a second time period, the offset component based on the compensation value.
In another embodiment, the method further comprises the act of linearly modifying the compensation value during the first time period. In yet another embodiment, the method further comprises the act of non-linearly modifying the compensation value during the first time period. In still another embodiment, the act of holding modifies a common-mode voltage of a capacitor existing in the feedback path.
Another aspect of the invention relates to an electrical circuit. The electrical circuit comprises a first input for receiving a communications signal comprising a baseband and an offset component and an amplifier module. The amplifier module is in communication with the first input and comprises a feedback loop, a track-and-hold circuit and a compensation circuit.
The track-and-hold circuit is in communication with said feedback loop. The track-and-hold circuit has at least one capacitance which stores a voltage related to the offset component. The track-and-hold circuit is further configured to output a compensation drive signal. The compensation circuit compensates the offset component by combining the offset component with the first drive signal.
In one embodiment, the feedback path further comprises a drive circuit which generates a first drive signal. The first drive s

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