Receiver for high bitrate binary signals

Details Receiver for high bitrate binary signals Receiver for high bitrate binary signals

2002-07-31

2008-12-16

Odom, Curtis B (Department: 2611)

Pulse or digital communications

Receivers

Automatic baseline or threshold adjustment

C375S286000, C375S287000, C375S340000

Reexamination Certificate

active

07466765

ABSTRACT:
A receiver for high bitrate binary signals contains a soft decision circuit with three parallel deciders coupled to a 2:1 multiplexer. The three deciders have different threshold values and generate four potential states. The 2:1 multiplexer translates the four different states into a restored data signal and a reliability signal indicating the decision reliability.

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