Receiver device, error detection circuit, and receiving method

Details Receiver device, error detection circuit, and receiving method Receiver device, error detection circuit, and receiving method

2008-05-08

2011-10-04

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S316000, C375S340000

Reexamination Certificate

active

08031817

ABSTRACT:
A receiver device which is small in scale of circuit configuration yet capable of detecting an error between symbol timing of a received signal and that generated therein and also restraining an error signal from varying due to variation in input level of the received signal. A delayer delays the received signal for one effective symbol period, a correlator calculates a correlation signal from the product of the received signal and the delayed signal, and an integrator calculates an integral value of the correlation signal. First and second accumulative adders accumulatively add up the integral values over respective predetermined periods before and after symbol start timing generated within the receiver device. An error signal generator generates an error signal by normalizing the difference between first and second sums obtained from the first and second accumulative adders, respectively, by means of the sum total of the first and second sums.

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