Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Timing
Reexamination Certificate
2011-07-19
2011-07-19
Proctor, Jason (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Timing
C716S030000
Reexamination Certificate
active
07983891
ABSTRACT:
A method for determining a worst-case transition is disclosed. The method includes determining a plurality of output slews for the plurality of input signals based on a timing model of a gate and selecting a worst delay input signal from the plurality of input signals based on the output slews.
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Cadence Design Systems Inc.
Louis Andre Pierre
Proctor Jason
Vista IP Law Group LLP
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