Receiver circuit with a bus-keeper feature

Details Receiver circuit with a bus-keeper feature Receiver circuit with a bus-keeper feature

1994-07-27

1996-07-02

Nelms, David C.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327112, 327379, 327387, 327391, 327427, 326 21, 326 30, H03K 300, H03K 1716

Patent

active

055326307

ABSTRACT:
A bidirectional input/output buffer is disclosed, where the receiver includes complementary bus keeper transistors. The keeper transistors are of opposite conductivity types, and have their gates coupled to the output of a receiver inverter. The keeper transistors thus reinforce the driven data state at the input of the receiver, in CMOS latch fashion, and hold the prior data state thereon after the driving output driver is in tristate. The keeper transistors have significantly weaker drive characteristics than the other receiver transistors, and than typical output drivers, so that the keeper transistors can be easily overdriven with the next data state, if different. In addition, the source/drain resistance of the keeper transistors is also preferably quite high, so that the power dissipation on switching is relatively low. These characteristics are readily achievable by providing relatively long channel lengths for the keeper transistors, relative to other transistors in the circuit.

REFERENCES:
patent: 4656429 (1987-04-01), Masuda et al.
patent: 4988893 (1991-01-01), Bonneau et al.
patent: 5001367 (1991-03-01), Vinal
patent: 5025182 (1991-06-01), Farmer
patent: 5027008 (1991-06-01), Runaldue
patent: 5117131 (1992-05-01), Ochi et al.
patent: 5122691 (1992-06-01), Balakrishnan

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