Receiver circuit and transmitter circuit

Optical communications – Transmitter and receiver system – Including synchronization

Reexamination Certificate

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Details

C398S155000, C398S074000, C375S355000

Reexamination Certificate

active

10759101

ABSTRACT:
The invention provides a transceiver circuit for communication that enhances the operation frequency of a synchronous digital circuit up to the maximum frequency of a flip-flop and inhibits the occurrence of jitters.A clock signal synchronized with data at f1
Hz is converted by a multiplier so that the signal has a frequency of “n” times so as to use the clock signal for triggering a flip-flop the operation frequency of which is f1b/s in the synchronous digital circuit. The multiplier is arranged in the vicinity of the flip-flop triggered by the clock signal of f1Hz so as to avoid the effect of the deterioration of the operation frequency by interconnect capacitance.The maximum operation frequency of the transceiver circuit determined based upon the operating frequency of the synchronous digital circuit can be enhanced up to the maximum operation frequency of the flip-flop. As a margin can be produced in designing a frequency band of a clock signal processing circuit, the reduction of power consumption, the reduction of phase noise and the extension of a control frequency range can be realized.

REFERENCES:
patent: 6999543 (2006-02-01), Trinh et al.
patent: 2004/0228636 (2004-11-01), Pathak et al.
H. M. Rein, “Si and SiGe Bipolar ICs for 10 to 40 Gb/s Optical-Fiber TDM Links”, Internatinoal Journal of High Speed Electronics and Systems, vol. 9, No. 2 (1998), published by World Scientific Publishing Company, pp. 347-383.
Zhihao H. Lao et al., “A 12 Gb/s Bipolar 4:1-Multiplexer IC for SDH Systems”, IEEE Journal of Solid-State Circuits, vol. 30, No. 2, Feb. 1995, pp. 129-132.

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