Receiver circuit and receiving method

Details Receiver circuit and receiving method Receiver circuit and receiving method

2011-01-04

2011-01-04

Payne, David C (Department: 2611)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S376000, C375S360000, C327S144000, C327S146000, C327S151000, C327S156000, C327S241000

Reexamination Certificate

active

07864894

ABSTRACT:
Clock signals are supplied, with a phase shift of 1
cycles between adjacent clock signals. A data acquisition unit acquires serial data at a timing of each of the clock signals. A phase detection unit detects the phase of the transition edge of the serial data using n bits of data. An effective bit number determination unit determines the effective bit number, which is the number of bits to be acquired, based upon the phase of the transition edge of the serial data in the current data-bit acquisition step and the phase of the transition edge of the serial data in the previous data-bit acquisition step. A data-bit output unit outputs the effective bit number of the bits of data acquired at a timing of each clock signal having a predetermined phase relation with the transition edge of the serial data.

REFERENCES:
patent: 6956923 (2005-10-01), Younis et al.
patent: 2006/0056563 (2006-03-01), Aweya et al.
patent: 2007/0087776 (2007-04-01), Terada et al.
patent: 2004-519943 (2004-07-01), None
patent: 2006-518130 (2006-08-01), None
Nick Sawyer: “Data Recovery”, XILINX, Inc., US, Aug. 7, 2002.

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