Receiver architecture eliminating static and dynamic DC...

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C455S196100

Reexamination Certificate

active

10644231

ABSTRACT:
The present invention provides a receiver frontend that eliminates static and dynamic DC errors and has improved second order intermodulation distortion (IMD2) performance. The receiver frontend includes a first mixer that multiplies a received signal and a first local oscillator (LO) signal to produce an intermediate frequency (IF) signal. A second mixer multiplies the IF signal and a second LO signal to produce an output signal. A first divider circuit divides a reference signal from a reference oscillator by a first divisor N to produce the first LO signal, and a second divider circuit divides the reference signal by a second divisor M to produce the second LO signal. Preferably, the first and second divisors N and M are each integers greater than one (1), and the second divisor M is not an integer multiple of the first divisor N.

REFERENCES:
patent: 5715529 (1998-02-01), Kianush et al.
patent: 6085075 (2000-07-01), Van Bezooijen
patent: 6282413 (2001-08-01), Baltus
patent: 6356597 (2002-03-01), Jackson et al.
patent: 6850748 (2005-02-01), Song et al.
patent: 6915117 (2005-07-01), Chominski et al.
patent: 2003/0076899 (2003-04-01), Kumar et al.
Shahrzad Tadjpour, Ellie Cijvat, Emad Hegazi, and Asad A. Abidi, “A 900-MHz Dual Conversion Low-IF GSM Reciver in 0.35-μm CMOS,” IEEE Journal of Solid-State Circuits, vol. 36, No. 12, Dec. 2001, pp. 1992-2002.
Shahrzad Tadjpour, Ellie Cijvat, Emad Hegazi, and Asad A. Abidi, “A 900-MHz Dual Conversion Low-IF GSM Reciver in 0.35-μm CMOS,” IEEE Solid-State Circuits Conference, Session 18/3G Wireless, Paper 18.5, Feb. 7, 2001.
Jan Crols and Michel S. J. Steyaert, “A Single-Chip 900 MHz CMOS Receiver Front-End with a High Performance Low-IF Topology,” IEEE Journal of Solid-State Circuits, vol. 30, No. 12, Dec. 1995, pp. 1483-1492.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Receiver architecture eliminating static and dynamic DC... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Receiver architecture eliminating static and dynamic DC..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Receiver architecture eliminating static and dynamic DC... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3738778

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.