Receiver and level converter circuit with dual feedback

Details Receiver and level converter circuit with dual feedback Receiver and level converter circuit with dual feedback

1989-05-04

1991-07-09

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307290, 307359, 307264, H03K 329, H03K 1902, H03L 500

Patent

active

050308564

ABSTRACT:
A receiver and level converter circuit is disclosed which may be used, for example, in converting low-level logic or other signals to high-level signals. In one embodiment, the circuit includes a differential amplifier having two feedback loops to provide an output signal having hysteresis, for increased gain, better noise margin and compensation. Each feedback loop includes a nonlinear difference network. In a preferred embodiment, the circuit is implemented in BICMOS technology, uses out-of-phase FETs as pull-down devices, and may be used to convert ECL-level signals to CMOS or BICMOS-level signals.

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