Amplifiers – With semiconductor amplifying device – Including differential amplifier
Utility Patent
2000-01-12
2001-01-02
Shingleton, Michael B (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S253000, C330S255000, C330S277000
Utility Patent
active
06169454
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to digital data transmission, and more particularly to a receive amplifier for receiving high-speed digital data transmissions.
BACKGROUND OF THE INVENTION
In data transmission, overall power dissipation can be reduced by reducing the signal power until the signal-to-noise ratio drops too low for reliable signal detection or until the increasing receiver gain requires power to increase more rapidly than the transmitter power decreases. Since noise pick-up and offset in the receive amplifier also may be significant or dominant, the receive amplifier can be the major factor in determining both data rate capability and signal level in the transmission channel. Generally, CMOS integrated circuit technology has made it possible to decrease the power dissipation of digital circuitry, while at the same time providing high data rate capability. It is important for all CMOS data transmission circuits to have compatible performance.
In order to avoid excessive power consumption and to minimize electro-magnetic interference (EMI), it is desirable to transmit high rate data at amplitudes corresponding to power on the order of one milliwatt (approximately 300 millivolts into a 100 ohm load, for example), much lower than typical logic levels and power supply voltages. While the maximum amplitude is determined by signal power, the minimum amplitude is limited by total noise pick-up and by receiver power consumption, receiver input offset voltage, and receiver bit rate capability vs. input signal amplitude. Power consumption is important not only in its own right, but also in that it effectively limits minimum signal amplitude because there is little benefit in decreasing signal power below a certain point if doing so requires even greater increase in receiver power to compensate. Because input offset voltage will tend to affect the detected logic state just as will any other form of unwanted input signal, the input offset voltage must be included in a summation of all relevant noise. Reduced amplitude signals typically reduce speed performance, so that the receive amplifier may be the speed-limiting factor in high rate communication links. In addition, in order to realize the fall advantages of differential signals, the amplifier must have low common-mode sensitivity and must operate over a relatively wide common-mode range. Thus, the receive amplifier generally plays a key role in the capabilities and limitations of high speed data communications links. Key performance criteria for a high speed data receive amplifier are:
a) high data rate capability,
b) low input offset voltage,
c) low power dissipation,
d) low sensitivity to input amplitude variations,
e) low sensitivity to common mode signals, and
f) wide common-mode rejection range.
Some data receivers of the prior art have used transient positive feedback to decrease rise and fall times (i.e. with positive feedback applied only for the time required to complete a transition and then shutting off).
PROBLEMS SOLVED BY THE INVENTION
The invention provides a receive amplifier which achieves high speed data reception with low power dissipation and high common-mode rejection, using modem high density low voltage CMOS fabrication processes. The invention also allows a second mode of operation, in which conventional signals, such as those from TTL logic devices can be received using the same input circuitry.
PURPOSE, OBJECTS, AND ADVANTAGES OF THE INVENTION
The purpose of the invention is providing an improved receive amplifier for receiving high-speed digital data transmissions. Specific objects include high data rate capability, low input offset voltage, low power dissipation, low sensitivity to input amplitude variations, low sensitivity to common-mode signals, and wide common-mode rejection range. A related object is a receive amplifier circuit using a minimum number of devices. Another related object is providing such a receive amplifier circuit made using CMOS process technology. Other objects include minimizing susceptibility of the receive amplifier circuit to noise and to external radiation interference. Thus, a related object is a receive amplifier circuit configuration that is fully differential. A further related object is higher characteristic line impedance as provided by differential wiring. A still further related object is substantial mutual cancellation of two matched opposing signals of a differential pair, with respect to coupling to and from other signals, and with respect to coupling to and from the power supply rails. Yet another object is an amplifier with flexibility which allows it to be simply adapted for use for two separate non-differential inputs. Finally, a major object is a particular new interconnection structure of input buffers and output switches in a complementary differential CMOS receive amplifier circuit, as described herein. These and other purposes, objects, and advantages will become apparent from a reading of the following description, along with the accompanying drawings.
SUMMARY OF THE INVENTION
The receive amplifier of this invention uses a novel differential input stage with a very wide common-mode rejection range and low offset voltage. This input stage interfaces the differential data signals to be received. The input stage is a dual complementary differential configuration of ten MOS transistors connected to provide a pair of differential inputs, a pair of differential outputs, and a single common-mode feedback input. The latter feedback input is used to achieve balance and high common-mode rejection. Two-transistor CMOS inverters are used elsewhere as amplifying stages due to their simplicity and high performance. In alternative embodiments, the nodes connected to the feedback input can be reconnected to other fixed voltages, typically the supply voltages, to form two independent amplifiers, one for each input node.
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patent: 5703532 (1997-12-01), Shin et al.
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Nortel Networks Limited
Shingleton Michael B
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