Real time two-dimensional discrete cosine transform/inverse disc

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G06F 1500

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active

056108494

ABSTRACT:
A 2-D DCT/IDCT circuit comprises a rate buffer, a multiplexer, a one-dimensional DCT/IDCT processor, a transpose buffer and an inverse rate buffer. The data input rate of the rate buffer and the output rate of the inverse rate buffer are a first rate, while the transform process, which is carried out between the rate buffer and the inverse rate buffer by the 1-D DCT/IDCT processor, is at a second rate. Since the second rate is approximately two times the first rate, the 2-D DCT/IDCT circuit can satisfy the requirement of high speed operation. Moreover, since the 2-D DCT/IDCT circuit according the present invention provides a specific arrangement of the order of input/output data, the hardware structure is simplified, thereby making it easy to realize in a VLSI circuit.

REFERENCES:
patent: 4791598 (1988-12-01), Liou et al.
patent: 5249146 (1993-09-01), Uramoto et al.
patent: 5257213 (1993-10-01), Kim et al.

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