Real-time signal analyzer

Details Real-time signal analyzer Real-time signal analyzer

1999-06-04

2002-04-23

Pham, Chi (Department: 2631)

Pulse or digital communications

Testing

C375S346000

Reexamination Certificate

active

06377617

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a signal analyzer that can analyze a signal in real time, more particularly to a new type real time signal analyzer that has both merits of a conventional real time FFT analyzer and a conventional vector signal analyzer and clears both demerits of them.
BACKGROUND ART
A real time FFT analyzer is a measurement apparatus that continuously transform a signal under test by FFT process in real time without dead time in order to extract and analyze the spectrum domain component from the signal.
FIG. 3
shows a schematic block diagram of such a conventional FFT analyzer that provides real time process. An analog to digital converter (ADC)
10
converts a signal under test into a digital signal and a digital down converter (DDC)
12
decimates the digital signal for substantial frequency conversion. A FFT processor
14
transforms the resultant time domain digital data, for example, 1024 points of the time domain data as one frame, into frequency domain digital data according to the FFT process. The DDC
12
has a sequential data buffer (not shown) in the output portion that stores the one frame data sequentially and continuously. The FFT processor
14
can complete the FFT process of the previous frame during the storage of the new data into the data buffer that allows real time data analysis. A memory
16
stores the output data of the FFT processor
14
sequentially.
A trigger circuit
18
can set up a trigger condition to the data in the memory
16
. If the trigger condition is satisfied, the trigger circuit
18
output a trigger signal to read out the data that qualifies the trigger condition. A CPU
20
wholly controls the real time analyzer. The data read out from the memory
16
are sent to a display circuit (not shown) to display them on a screen (not shown). This real time FFT analyzer can extract spectrum (frequency component) in real time without dead time and could catch an event occurrence that meets an arbitrary trigger condition.
FIG. 4
shows a schematic block diagram of an example of a conventional vector signal analyzer. Elements corresponding to that of
FIG. 3
have the same reference symbols. A memory
16
stores output data of a DDC
12
and the stored data are transferred to a digital signal processor (DSP)
17
to execute analytic processes such as a FFT process. The vector signal analyzer of this type is suitable for demodulating various modulated vector signals and provides a flexible signal analysis because it executes the various analytic processes after storing the time domain data in the memory
16
.
The real time FFT analyzer of
FIG. 3
, however, must transform the frequency domain data in the memory by the inverse FFT process in order to reproduce the time domain data for analyzing the digital modulated signal in time domain displays such as “eye pattern” or “constellation”. Besides, a FFT process multiplied by a window function makes it impossible to completely reproduce the original time domain signal.
One the other hand, it is difficult for the vector signal analyzer of
FIG. 4
to produce the frequency domain data in real time because the data in the memory are the time domain data. Therefore it is difficult to catch a transient fluctuation of the frequency spectrum.
As described, the real time FFT analyzer and the vector signal analyzer are used in different ways and the merits and the demerits of them counter each other.
Therefore what is desired is to provide a real time signal analyzer that has both merits of the conventional real time FFT analyzer and the conventional vector signal analyzer and clears both demerits of them.
DISCLOSURE OF INVENTION
A real time signal analyzer according to the present invention has a FFT processor that transform time domain data by FFT process in real time, a delay means for delaying the time domain data, a memory means for storing frequency domain data transformed by the FFT process from the FFT processor, and a memory means for storing delayed time domain data read out from the delay means.
Delay time of the delay means is set up according to the process time of the FFT processor, then time correspondence between the delayed time domain data and the frequency domain data is secured. Therefore it generates the time domain data and the frequency domain data in real time respectively but having the time correspondence each other.


REFERENCES:
patent: 5479440 (1995-12-01), Esfahani
patent: 5576978 (1996-11-01), Kiiayoshi
patent: 5697078 (1997-12-01), Peterson et al.
patent: 5760308 (1998-06-01), Beall et al.
patent: 5764763 (1998-06-01), Jensen et al.
patent: 0 285 238 (1988-10-01), None

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