Real-time rejection circuit to automatically reject multiple int

Details Real-time rejection circuit to automatically reject multiple int Real-time rejection circuit to automatically reject multiple int

1990-01-08

1990-10-23

Barron, Jr., Gilberto

Communications: directive radio wave systems and devices (e.g.,

Radar ew

Eccm

307520, 328165, 455303, G01S 736, H04B 110

Patent

active

049655817

ABSTRACT:
A real-time rejection circuit for passing low level desired signals in the resence of one or more strong, interfering signals. A chirp-Z transform system separates the various frequency components of a received signal into frequency segregated time domain signals. A power splitter separates the time domain signal into two paths. One path includes a modulator or switch that is normally biased "ON" for passing the time domain signal. The second path includes a diode detector that produces pulses of sufficient strength when a strong interfering component is present to override the bias and turn the modulator "OFF" for a sufficient period of time to attenuate the unwanted frequency components in the other path. The modulator output will primarily contain the low level desired frequency components that are passed through an inverse transform device for producing a frequency domain signal of the desired signal uncorrupted by unwanted signals.

REFERENCES:
patent: 3155912 (1964-11-01), Applebaum et al.
patent: 3495244 (1970-02-01), Rosa
patent: 3588534 (1971-06-01), Campbell
patent: 4038539 (1977-07-01), Van Cleave
patent: 4521917 (1985-06-01), Holt

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