Real time processor for video signals

Details Real time processor for video signals Real time processor for video signals

1989-07-05

1990-07-17

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358166, 358167, H04N 514

Patent

active

049424700

ABSTRACT:
This is a real time video signal processor for real time digital processing of video signals with a plurality of unit processors. All the unit processors are connected in parallel between an input bus and an output bus. Each unit processor consists of an input section connected to the input bus, a processing section for digital processing of video signals written into the input section, and an output section for supplying video signals processed by the processing section to the output bus. There is provided control sections for generating control signals to command what picture block of each frame is to be written into each unit processor and what picture block of each processed frame is to be outputted. Generally, each unit processor takes in a greater picture block than the picture block to be processed, and each processor independently accomplishes digital processing of the picture block assigned to it without communicating with any other unit processor.

REFERENCES:
patent: 4148070 (1979-04-01), Taylor
patent: 4363104 (1982-12-01), Nussmeier
patent: 4550437 (1985-10-01), Kobayashi et al.
patent: 4689676 (1987-08-01), Nakajima
"Motion-Compensated Interframe Coding for Video Conference" by Koga, Hirano, Ohki and Iinuma, in CS81-87, pp. 85-90.
"A Single-Chip Digital Signal Processor for Telecommunication Applications", by Nishitani, Maruta, Kawakami & Goto, in IEEE Journal of Solid-State Circuits, vol. SC-16, No. 4, Aug. 1981, pp. 372-376.
"A 32kb/s Toll Quality ADPCM Codec Using a Single Chip Signal Processor", by Nishitani, Aikoh, Araseki, Ozawa & Maruta, 1982, pp. 960-963.

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