Readout chip for nuclear applications

Details Readout chip for nuclear applications Readout chip for nuclear applications

2000-06-13

2001-12-25

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S051000, C327S069000, C327S071000, C327S077000, C327S080000, C327S094000

Reexamination Certificate

active

06333648

ABSTRACT:

The present invention relates generally to data acquisition systems, and more particularly to a front end electronics readout chip.
BACKGROUND OF THE INVENTION
The successful application of solid state detectors such as silicon strip detectors for high energy physics experiments was largely due to the development of multi-channel front-end readout electronics mixed signal Application Specific Integrated Circuits (ASIC) chips, such as the SVX and Amplex chips. Without these monolithic CMOS chips high resolution particle detectors would not be practical. These chips were read out in conjunction with an external trigger supplied by the particle accelerator supplying the particle beam to the experiment. The trigger notifies the control electronics when to read the ASIC chips.
Physics, medicine, materials science, non-destructive evaluation, manufacturing, and environmental science are in need of room temperature, high resolution, and/or position-sensitive radiation detectors. The present scintillator and CCD-based technologies either cannot produce high resolution imaging or do not have the sensitivity. Room temperature radiation detectors are the driving force behind the current effort to develop II-VI semiconductor materials. A room temperature, position-sensitive, high resolution technology such as silicon strip, silicon drift, or silicon pixel detectors coupled to dedicated readout electronics may fill many of the demands of the new detection applications and push radiation imaging to a new level of resolution and flexibility. Unfortunately, the ASIC chips developed for high energy physics experiments cannot be used for most commercial applications such as medical and industrial imaging where an external trigger signal is unavailable.
A front end electronics readout mixed signal ASIC chip normally has a large number of identical channels within a single monolithic chip. The channel number typically ranges from 4 to 256. Newer versions with more channels may be fabricated as narrower (i.e., less than 1 micrometer) processing capabilities become available. One of the principal benefits of these chips is the ability to handle the readout from detectors with extremely large numbers of channels. Because these chips can amplify minute amounts of charge produced by the detectors they are subject to noise problems. In order to reduce the noise, the chips are typically mounted very close to the detector element, strip, pad, or pixel. The detector elements, strips, pads, or pixels are then connected directly or indirectly with the shortest possible length to the input of the ASIC chip. The power supply rails have to be bypassed very close to the ASIC chip as well. The control and output signals are connected to control electronics which controls and interfaces the ASIC chip to the host computer.
Most conventional ASIC chips can only handle low capacitance inputs. They have fixed peaking times, no self trigger output, and either no sparse readout capability or only straight sparse readout capability.
From the foregoing, it is apparent that an ASIC chip which is suitable for use with position sensitive solid state detectors for nuclear instruments is desirable.
SUMMARY OF THE INVENTION
The present invention provides a front end multi-channel readout chip which can be used with a variety of different detectors. Each channel of the readout chip consists of an analog section which provides analog output signals on an A (i.e., analog) bus, and a digital section which provides fast trigger signals on a T (i.e., trigger) bus. Input from a detector goes directly into a low noise charge sensitive preamplifier. The output of the preamplifier goes into a polarity switching circuit and then an amplifier with gain. The next stage is a shaper amplifier with a variable peaking time followed by a peak hold (peak detect) circuit. The output of the peak hold circuit goes into two comparators. The first comparator is a low level discriminator and produces the trigger signal. The second comparator provides a higher level discriminator than the first. Therefore the second comparator can be used to reject events that produce a signal above a set pulse height. The signals from the first comparator from all the channels are sent to a separate OR circuit to produce the external trigger output. The trigger output signals the external readout interface that an event has occurred and provides an accurate timing of the event. There are several readout: modes for the preferred embodiment of the chip, some of which are: (i) a sparse readout mode which allows the readout of only the input channels that have a signal; (ii) a nearest neighbor readout mode which allows the readout of the detector strips with a signal and the two nearest neighbors; (iii) an all channel readout mode which allows the readout of all the channels of the chip in sequence; (iv) a global trigger mode; (v) an external delay mode; and (vi) a force enable mode which continuously connects any selected channel to the analog output.
A further understanding of the nature and advantages of the present invention may be realized by reference to the remaining portions of the specification and the drawings.


REFERENCES:
patent: 3430197 (1969-02-01), Brown
patent: 3740760 (1973-06-01), Johnson et al.
patent: 4556982 (1985-12-01), Dunn
patent: 5696458 (1997-12-01), Tumer et al.
patent: 5943388 (1999-08-01), Tumer

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