Reading technique for memory cell with electrically floating...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S149000, C365S182000, C365S184000, C257S296000, C257S304000, C257S347000, C257S314000, C257S402000

Reexamination Certificate

active

08085594

ABSTRACT:
A semiconductor device along with circuits including the same and methods of operating the same are described. The device comprises a memory cell consisting essentially of one transistor. The transistor comprises a gate, an electrically floating body region, and a source region and a drain region adjacent the body region. The device includes data sense circuitry coupled to the memory cell. The data sense circuitry comprises a word line coupled to the gate region and a bit output coupled to the source region or the drain region.

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