Reading method of a NAND-type memory device and NAND-type...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185170, C365S185180, C365S185250

Reexamination Certificate

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11458916

ABSTRACT:
A reading method of a NAND memory device includes the steps of first connecting a first end terminal of a stack of cells to a reference line, second connecting a second end terminal of the stack of cells to a respective bitline, and charging the bitline to a predetermined bitline read voltage, where one of the steps of first connecting and second connecting is carried out before charging the bitline and the other of the steps of first connecting and second connecting is carried out after charging the bitline. An order of carrying out the steps of first connecting and second connecting is determined based on an address of a selected cell.

REFERENCES:
patent: 6175522 (2001-01-01), Fang
patent: 6567305 (2003-05-01), Nakamura
patent: 6982905 (2006-01-01), Nguyen
patent: 7203092 (2007-04-01), Nazarian
patent: 2005/0078518 (2005-04-01), Nguyen
patent: 2007/0133288 (2007-06-01), Iwai et al.

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