Reading flash memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185180, C365S185190, C365S185290, C365S185330

Reexamination Certificate

active

06950344

ABSTRACT:
A method and system for reading flash memory. A leakage current of a common bit line comprising the flash memory cell is accessed. A read current of the flash memory cell is accessed. The leakage current is eliminated from the read current to determine a cell current. The cell current is compared to an erase verify cell current. The currents may be directly subtracted, or they may be converted to corresponding voltages and the voltages subtracted. Advantageously, cells may be correctly verified for erasure without a preliminary search and recovery of over erased bits. As a beneficial result, the search and recovery of over erased bits does not need to be performed during an erase process. Advantageously, such steps may be eliminated from an erase process, recovering the time otherwise required to perform such steps, and thereby speeding up the erase process.

REFERENCES:
patent: 6525969 (2003-02-01), Kurihara et al.
patent: 6529398 (2003-03-01), Nair et al.

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