Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-01-08
2003-07-22
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S090000, C345S204000, C345S205000
Reexamination Certificate
active
06597329
ABSTRACT:
BACKGROUND
1. Field
The present invention relates generally to computer systems and, more specifically, to computer display system architectures.
2. Description
In many computer systems, an important feature is the ability for the system to display information to a user. In such systems, a display device is included to receive data from other components of the computer system for presentation in a visual form for viewing by the user. Commonly, the display device is a raster display having a cathode ray tube (CRT). Such a display device is by nature “write only.” That is, once the data is transferred to the display, it cannot be retrieved.
In current computer systems, a processor typically does not communicate directly with the display device. Instead, in order to display data in current computer systems, the processor typically transfers the data over a bus and through a graphics controller circuit for storage in a graphics memory device. One common graphics memory device is a video random access memory (VRAM). The graphics controller then reads the display data out of the memory and transfers the display data to the display device for presentation to the user. However, the information that is visually presented on a typical display device is transitory in nature. That is, the display device visual image must be continuously refreshed, even if the underlying display data remains unchanged. To refresh the image, the display device must continually receive the display data from the graphics controller circuit. If the processor were to be coupled directly to the display device, this display refresh activity could reduce the time available for the processor to perform other operations. Hence, the graphics controller circuit is typically used in a computer system to update, or refresh, the display data as necessary in order to offload this display updating task from the processor. Thus, when the processor needs to access any information that is being displayed, the processor reads the data from the graphics memory device via the graphics controller circuit. The processor does not directly read data from the display device itself.
When the graphics controller circuit refreshes the display data, it transfers an entire copy of the display data to the display device. An entire copy is transferred although in many instances only a portion of or perhaps even none of the image has changed. Even when the display device is a matrix addressable display, such as a liquid crystal display (LCD), a light emitting polymer (LEP) display, or a reflective silicon display, the display device is refreshed “blind” by a graphics controller circuit. This means that every pixel in the display is re-written on a periodic basis, even if the intensity values of the pixels have not changed since the previous refresh cycle. This mandatory refresh operation adds complexity to the processor/display interface and lowers the effective bandwidth of the display.
Although the inclusion of the graphics controller circuit and the graphics memory device may improve the overall performance of some computer systems, these devices introduce additional cost and complexity to the systems. With the advent of new display technologies, faster buses, and increasingly more powerful processors, a new paradigm for computer display system architectures is desired.
SUMMARY
An embodiment of the present invention is a system having a display device and a processor coupled to the display device to read data from and write data to the display device.
Another embodiment of the present invention is a method operating in a system having a processor coupled to a matrix addressable display device having a plurality of pixels, the method comprising reading display data by the processor from selected individual pixels of the matrix addressable display device.
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Intel Corporation
Shankar Vijay
Skabrat Steven P.
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