Read/write control circuit

Details Read/write control circuit Read/write control circuit

1984-08-29

1987-09-29

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307200B, 307469, 307296R, 307481, 307579, 307585, 365227, H03K 19096, H03K 1716, G06F 738

Patent

active

046971017

ABSTRACT:
A semiconductor integrated circuit which has a CMOS inverter formed of p- and n-channel MOSFETs, and a D-type n-channel MOSFET coupled at the gate to the output terminal of the CMOS inverter, having one end coupled to a high voltage terminal and the other end coupled to the drain of the p-channel MOSFET.

REFERENCES:
patent: 4442481 (1984-04-01), Brahmbhatt
patent: 4565932 (1986-01-01), Kuo et al.
"Programmable Logic Circuit", Suwa et al.
Patent Abstracts of Japan, Denki, G11C17/00F 4P.
Gerber et al., "Low-Voltage Single Supply CMOS Electrically Erasable Read-Only Memory," IEEE Transactions on Electron Devices, vol. ED-27, No. 7, Jul. 1980.

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