Read, verify word line reference voltage to track source level

Static information storage and retrieval – Floating gate – Disturbance control

Reexamination Certificate

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Details

C365S185220, C365S185210, C365S185090, C365S189070, C365S189150, C365S185230

Reexamination Certificate

active

08054681

ABSTRACT:
A non-volatile memory device has individual pages of memory cells to be sensed in parallel. The memory device includes a source level tracking circuit coupled to receive a predetermined word line voltage from a word line voltage supply and the voltage level at the aggregate source node of one or more pages and coupled to provide to word lines of the memory an output voltage during the sensing operation, where the source level tracking circuit includes an op amp whereby the output voltage is the word line voltage offset by an amount to track the voltage level at the aggregate node and compensate for source bias errors due to a finite resistance in the ground loop.

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Eitan et al., “NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell,” IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000, pp. 543-545.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration for International Application No. PCT/US2008/086870, mailed Mar. 19, 2009, 13 pages.

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