Read-out circuit for a photodetector

Details Read-out circuit for a photodetector Read-out circuit for a photodetector

1991-03-19

1992-10-13

Hannaher, Constantine

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

250332, H01L 27146

Patent

active

051553481

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
This invention relates to a read-out circuit for a photodetector, and is particularly relevant to such circuits for use with focal plane photodetector arrays operating at infra-red (IR) wavelengths.
2. Discussion of Prior Art
Two dimensional IR photodetector arrays typically incorporate 128.times.128 photodiodes hybridised on to a silicon substrate measuring 6 mm.times.6 mm. Each photodiode responds to the integrated effect of respective incident photons by creating a charge of measurable magnitude which is converted to a current or voltage signal by electronic circuitry located on the same substrate. The signals from each photodiode are subsequently fed via a multiplexer to remote electronic circuitry for further processing.
Each photodiode of such an array has an associated MOS (metal-oxide-semiconductor) transistor, which transfers the photocharge from the respective photodiode to an associated precharged storage capacitor. The current flowing through each photodiode in response to incident IR radiation is then allowed to discharge its respective capacitor for a fixed time interval. The voltages remaining on the capacitors are then transferred via a multiplexer to remote signal processing circuitry. The capacitors are recharged and the process is repeated.
The output signal from a DC coupled IR detector array is normally composed of the wanted signal comprising the fine detail of the scene under surveillance superimposed upon a background "pedestal" signal. The pedestal can be a factor of one thousand or more larger than the wanted signal. It is likely to have a different value for each photodiode owing to, for example, variations in the cut-off wavelength. Photodiode arrays are normally operated under reverse diode bias. This results in a leakage current contribution to the photodiode output signal.
The presence of the unwanted pedestal and leakage signals imposes constraints and limitations on the design and performance of any detector array read-out circuitry. For example, the remote processing circuitry requires a large dynamic range (typically 12 bits) so that it may handle both the wanted signal and the unwanted pedestal. Also, since photocharge is integrated on the focal plane, a large fraction of the available storage capacity is used to store the pedestal charge, leaving less capacity for the wanted signal and thus degrading performance.


SUMMARY OF THE INVENTION

It is an object of the invention to provide an alternative form of photodetector read-out circuit usable with processing circuitry of reduced dynamic range compared to the prior art.
The present invention provides a read-out circuit for a photodetector, the circuit including correcting means arranged to derive a correction signal from the photodetector output during a calibration phase, and integrating means arranged to receive a measurement phase signal derived from the photodetector output during a measurement phase, characterised in that the integrating means is arranged to receive the measurement phase signal and the correction signal concurrently during the measurement phase and to integrate their difference.
The invention provides the advantage of reduction in dynamic range required of post-readout circuitry, by virtue of signal differencing prior to integration. This reduces the pedestal and leakage contribution to the integrated signal prior to transfer to remote circuitry.
The integrating means is preferably a storage capacitor chargeable to a preset voltage, and the photodetector and the correcting means are preferably arranged to give rise to respective signal currents in counterflow during measurement phase to produce a net current difference signal for integration by the storage capacitor.
The correcting means may be a constant current circuit which produces an output current under the control of the voltage on a reference capacitor. The reference capacitor is chargeable to an appropriate voltage in response to the photodetector output during the calibration phase.
A

REFERENCES:
patent: 4771175 (1988-09-01), Sirieix et al.
Patent Abstract of Japan, vol. 5, No. 186 (E-84)(858), Nov. 25, 1981; JP, A, 56-111382 (Hitachi) Sep. 3, 1981.

Affiliated with

Also associated with

Rating

Read-out circuit for a photodetector does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Read-out circuit for a photodetector, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Read-out circuit for a photodetector will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1302800