Read only type semiconductor memory device including address coi

Details Read only type semiconductor memory device including address coi Read only type semiconductor memory device including address coi

1992-04-13

1995-11-14

Gossage, Glenn

Static information storage and retrieval

Magnetic bubbles

Guide structure

39542101, 365200, 365 94, 36518907, 364DIG1, G06F 1200, G06F 1116, G11C 1710, G11C 2900

Patent

active

054674573

ABSTRACT:
A read only semiconductor memory device includes a plurality of address coincidence detecting circuits, each of which has a specific address region assigned thereto and generates an address coincidence detecting signal when an input address signal designates an address in the assigned region. A priority circuit determines a priority order among the plurality of address coincidence detection signals from the plurality of coincidence detecting circuits. In accordance with a signal to which priority is given by the priority circuit, a data output terminal receives memory cell data read from a memory array or is fixed at a predetermined logical level. With respect to a memory address region containing a succession of only data of logic "1" or "0" (that is, a region with all "1's" or "0's"), data of a logical level predetermined by a switching circuit is output to the data output terminal. For this memory address region, fixed data, which is not read from the memory array, is outputted. Therefore, a defective bit in this memory address region can be repaired efficiently, resulting in a high product yield of the read only semiconductor memory device.

REFERENCES:
patent: 4639897 (1987-01-01), Wacyk
patent: 4942556 (1990-07-01), Sasaki et al.
patent: 4958377 (1990-09-01), Takahashi
patent: 5179536 (1993-01-01), Kasa et al.

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