Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1997-10-08
2000-02-01
Yoo, Do Hyun
Static information storage and retrieval
Addressing
Plural blocks or banks
365 94, 36518905, 365203, G11C 700
Patent
active
060210850
ABSTRACT:
A read only semiconductor memory includes a memory cell array having columns of memory cell groups, each group including memory cells arranged in rows and columns. A flag memory indicates whether stored data has been inverted. Word lines in rows connect memory cells and flag memory cells. Bit line groups connect memory cells of the memory cell groups. A flag bit line includes lines connecting to the flag memory cells. A bit line selector and a flag bit selector select a flag bit line. An output circuit may convert stored information. Row address signals select one of the word lines, and the information stored in memory cells and flag memory cells connected to the word line are read on the corresponding bit lines. A bit line selector receives the column address signals, and a bit line selector selects one of the bit lines, and a flag bit line selector selects one of the flag bit lines, which appear on the signal lines. The output circuit carries out an exclusive logical sum between the information appearing on the respective signal lines and outputs the results as read data. The semiconductor memory device can reduce circuit size and facilitate high density integration, reducing power consumption.
REFERENCES:
patent: 4942556 (1990-07-01), Sasaki et al.
patent: 4975873 (1990-12-01), Nakabayashi et al.
patent: 5745409 (1998-04-01), Wong et al.
Mitsubishi Denki & Kabushiki Kaisha
Yoo Do Hyun
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