Fishing – trapping – and vermin destroying
Patent
1992-09-08
1993-11-23
Thomas, Tom
Fishing, trapping, and vermin destroying
437 45, 437 48, H01L 2170
Patent
active
052643867
ABSTRACT:
A method for making a Read Only Memory having spaced source and drain regions in a substrate and a plurality of closely spaced gate electrodes on the surface, spanning the distance between the source and drain. The method features the fabrication of a double density polysilicon word line structure for a given integrated circuit chip area. The method also features the formation of a first and a second code ion implant which uses self-alignment techniques, rather than using lithography techniques.
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patent: 4826786 (1989-05-01), Merenda
patent: 4894351 (1990-01-01), Batty
patent: 4986878 (1991-01-01), Malazgirt et al.
patent: 5002896 (1991-03-01), Naruke
Saile George O.
Thomas Tom
United Microelectronics Corporation
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