Read-only memory device

Static information storage and retrieval – Read only systems – Semiconductive

Patent

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365 94, G11C 1140

Patent

active

044266863

ABSTRACT:
A read-only memory device in which the presence or absence of a MOS transistor in a memory cell located at each intersection between word lines and bit lines is disclosed. In this device, when data belonging to one word line is written into the memory cells, the original data or the inverted data of the original data is written. The determination whether or not the data is inverted is performed in accordance with the number of data "0" or "1" belonging to each word line.

REFERENCES:
patent: 3609708 (1971-09-01), Cragon et al.
patent: 4084105 (1978-04-01), Teranishi et al.
patent: 4144587 (1979-03-01), Miyakawa et al.
Williams et al., "Read-Only Storage Data Inversion for Speed Enhancement", IBM Tech. Disc. Bul., vol. 22, No. 8B, 1/80, pp. 3793-3794.
Jordan et al., "Read-Only Memory", IBM Tech. Disc. Bul., vol. 14, No. 7, 12/71, 526590066, pp. 2132-2135.

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