Read-only memory construction and related method

Details Read-only memory construction and related method Read-only memory construction and related method

1983-06-08

1985-10-08

Popek, Joseph A.

Static information storage and retrieval

Powering

Conservation of power

365 94, G11C 1140

Patent

active

045464561

ABSTRACT:
A read-only memory circuit having, for a given memory access time, a power requirement of approximately one half of the power requirement needed to allow for a worst-case condition in which all bit storage locations may be in a binary memory state requiring maximum power consumption. Information stored in each row of the memory circuit is selectively complemented to minimize the power consumption in the individual rows and columns. Tables are used to store complement indicators for the rows and columns, and decoding circuitry selectively complements data read from the memory circuit, in accordance with the stored complement indicators.

REFERENCES:
patent: 3764833 (1973-10-01), Ayling et al.
patent: 3859637 (1975-01-01), Platt et al.

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