Read only memory capable of realizing high-speed read operation

Static information storage and retrieval – Read only systems – Semiconductive

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365185, G11C 1700, G11C 1134

Patent

active

053922336

ABSTRACT:
A mask read only memory (ROM) has a small chip size and realizes high-speed operation and a large capacity by reducing a wiring capacity of a main bit line and a virtual ground line. Between the main bit line and the virtual ground line are three bit lines, and between the main bit line and the virtual ground line are formed two columns of memory cell transistor columns in the direction of the word line, Furthermore, the main bit line and the virtual ground line do not have zig-zag wiring, and can be configured so that the lines are in parallel straight lines so that the connections between the bit lines and the main bit lines, and between the bit lines and the virtual ground lines can be suitably made or broken by a drive current supplied via a selector line and using transistors as gates, to therefore enable the selection of a required memory cell transistor column by on-off control,

REFERENCES:
patent: 5117389 (1992-05-01), Yiu
patent: 5202848 (1993-04-01), Nakagawara
"16Mb ROM Design Using Bank Select Architecture", M. Okada, et al., Symposium VLSI Circuits, Aug. 1988.

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