Read-only memory and method of manufacturing the same

Static information storage and retrieval – Read only systems – Semiconductive

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365 51, 357 41, 357 55, G11C 1140, G11C 1300

Patent

active

046302379

ABSTRACT:
A read-only memory has memory cells each with a vertical metal oxide semiconductor field effect transistor and a bit line. The vertical metal oxide semiconductor field effect transistor has a gate electrode serving as a word line, a source, a drain, and a vertical channel region between the source and drain constituted by first and second diffusion layers. The gate electrode is formed on a side wall of a trench, which has a pair of side walls substantially perpendicular to a major surface of a semiconductor substrate of a first conductivity type and an interconnecting bottom surface substantially perpendicular to the side wall surfaces. The first and second diffusion layers of a second conductivity type are formed in an upper portion of the semiconductor substrate and in a bottom of the trench, respectively. The bit lines are formed in a predetermined pattern. One of the first and second diffusion layers is connected to the bit line through a contact hole and the other of the first and second diffusion layers is used as a common current line. A method of manufacturing the read-only memory is also proposed.

REFERENCES:
patent: 4222062 (1980-09-01), Trotter et al.
"VMOS ROM" by T. J. Rodgers et al., IEEE Journal of Solid-State Circuits, vol. SC-11, No. 5, Oct. 1976.

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