Read only memory and decode circuit

Details Read only memory and decode circuit Read only memory and decode circuit

1983-09-12

1986-04-15

Zache, Raulfe B.

Boots, shoes, and leggings

365 94, 307463, G06F 1200

Patent

active

045831688

ABSTRACT:
A microprocessor integrated circuit (50) has a read only memory (ROM) (400) which is X and Y addressible and is word, bit and page oriented. The microprocessor integrated circuit (50) has a main injector bus (602) and a ground return bus (604) with a branch ground bus (608) connected to the ground return bus (604) through a ground-balancing resistor (610) in a data path. The circuit (50) has a register file (82) with registers (622) connected to a local bus (604). The local busses (604) are connected to a main bus (602) through a multiplexer (605). The microprocessor integrated circuit (50) includes a D-type flip-flop circuit (700) with asynchronous clear and preset. A latch dual port random access memory (RAM) circuit (900) is employed in the register file (82) of the microprocessor integrated circuit (50).

REFERENCES:
patent: 4401903 (1983-08-01), Iizuka
patent: 4434465 (1984-02-01), McDonough et al.
patent: 4479126 (1984-10-01), Higuchi et al.

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