Read-only memory

Static information storage and retrieval – Read only systems – Semiconductive

Patent

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Details

365 94, 365203, 365190, 365202, G11C 1712

Patent

active

054105013

ABSTRACT:
A plurality of memory cells arrayed in columns with the memory cells within a column connected between precharged first and second output lines. An input line selects a memory cell within a volume causing the first output line to be pulled to a first voltage when the cell is programmed a true and causing the second output line to be pulled to a first voltage when the cell is programmed a "complement". A pair of cross-coupled transistors connected between the first and second output lines of a column causes the second output line to be maintained at the precharged voltage when programmed a "true" and causes the first output line to be maintained at a precharged voltage when the cell is programmed a "complement".

REFERENCES:
patent: 4599704 (1986-07-01), Mazin
patent: 5053997 (1991-10-01), Miyamato et al.

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