Static information storage and retrieval – Floating gate – Particular biasing
Patent
1996-01-11
1998-05-12
Clawson, Jr., Joseph E.
Static information storage and retrieval
Floating gate
Particular biasing
3651852, 36518521, 36518503, 327 93, 327 94, G11C 1604
Patent
active
057516359
ABSTRACT:
Circuits and processes write and read analog signals in non-volatile memory cells such as EPROM and flash EPROM cells. One read circuit process determines a memory cell's threshold voltage by slowly ramps the control gate voltage of a memory cell being read and senses when the memory cell conducts. Another read circuit determines the threshold voltage of a memory cell using a source follower read process and a ramping circuit which slowly increases the source voltage. Still another read circuit includes a cascoding device connectable to a memory cell, bias circuit for biasing the memory cell in its linear region, and a load which carries a current that mirrors the current through the memory cell wherein the threshold voltage of the memory cell is determined from a voltage across the load. Read circuits disclosed can be used with analog memory cells, binary memory cells, multi-level digital memory cells, and other applications which require precise reading of threshold voltages.
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So Hock C.
Wong Sau C.
Clawson Jr. Joseph E.
inVoice Technology, Inc.
MacPherson Alan H.
Millers David T.
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