Static information storage and retrieval – Floating gate – Particular biasing
Patent
1997-09-22
1999-01-12
Nelms, David
Static information storage and retrieval
Floating gate
Particular biasing
36518521, 365149, 36518911, 365190, G11C 1606
Patent
active
058597980
ABSTRACT:
The memory, in integrated circuit form, is supplied with a low supply voltage and includes a read circuit enabling the detection of the state of the cells of the memory. In a current mirror of the read circuit, there is provided a shifting circuit between the drain and the gate of a reference transistor. The shifting circuit may include a shift transistor and a bias transistor.
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R. Gastaldi et al., IEEE Journal of Solid-State Circuits, "A 1-MBit CMOS EPROM with Enhanced Verification", vol. 23, No. 5, Oct. 1998, pp. 1150-1156
T. Serrano et al., IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, "The Active-Input Regulated-Cascode Current Mirror", vol. 41, No. 6, Jun. 1994, pp. 464-467.
M.G. Johnson, IEEE Journal of Solid-State Circuits, "An Input-Free VT Extractor Circuit Using a Two-Transistor Differential Amplifier", vol. 28, No., 6, Jun. 1993, pp. 704-705.
Le Thong
Nelms David
SGS-Thomson Microelectronics S.A.
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