Read channel equalization with enhanced signal to noise ratio

Details Read channel equalization with enhanced signal to noise ratio Read channel equalization with enhanced signal to noise ratio

1999-04-28

2002-07-02

Hudspeth, David (Department: 2651)

Dynamic magnetic information storage or retrieval

General recording or reproducing

Specifics of equalizing

C360S046000

Reexamination Certificate

active

06414810

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates in general to processing circuits of analog signals. In particular, the invention relates to circuits for processing analog signals originating from electromagnetic transducers or heads reading data stored in magnetic media, for example, in read channels of Hard Disk Drives (HDD).
BACKGROUND OF THE INVENTION
In data reading systems (also referred to as read channels) from magnetic mass memories such as hard disks (HD), tapes, floppy disks, etc., used in personal computers, it is desired to ensure the highest possible signal to noise ratio (SNR), for reasons of reliability and data transfer speed. Depending on the class of read channel (PR
4
, EPR
4
, EEPR
4
, . . . ) the requirements are relatively stringent. Although, along the analog signal path originating from a read head, it is necessary to provide a pre-equalization to accentuate the gain of the read channel in the frequency range where the signal's energy reaches its maximum energy.
A typical functional schematic of an HDD read channel is illustrated in FIG.
1
. As shown in the example of
FIG. 1
, the read channels commonly have an automatic gain control circuit (AGC) realized through a variable gain amplifier VGA controlled through a digital/analog converter DAC_VGA. This is done to keep constant the amplitude of the signal supplied to the input of the analog/digital converter ATOD, regardless of the amplitude of the input signal and of the gain of the filter in the signal band. The Magnetic Resistive Asymmetry MRA block has the function of eliminating, or at least attenuating, the second harmonic (that is the contribution given by the term &agr;x
2
) of the analog input signal originating from the read head MR. This spectrum correction operation on the signal is dynamically controlled through the digital/analog converter DAC_MRA.
Depending on the equalization required for the particular transducer's characteristics, the boost of the low pass filter transfer function may be programmed through the DAC_BOOST block, and the filter's cut-off through the DAC_FC converter. The two converters convert programming digital commands (Word FC and Word Boost) into analog control signals for the transfer function of the low pass filter. In cascade to the low pass filter LPF there is an OFFSET STAGE capable of eliminating the eventual offset existing at the output of the equalizing low pass filter LPF. Even for this stage, a programmable control is implemented by the use of a DIGITAL POST PROCESSING block through the digital/analog converter DAC_OFF.
The DIGITAL POST PROCESSING block acts through the control loop realized by the DAC converter and by the voltage controlled oscillator VCO to maintain a correct sampling synchronization by the ATOD converter.
In known systems, the amplitude of the output signal of the VGA block depends on the programmed boost. In practice, the higher the programmed boost, the higher the band gain and therefore the system intervenes to reduce the amplitude of the signal output by the VGA block. Therefore, when a certain application requires high boost values, a part of the analog processing section operates with a signal amplitude relatively lower (lower level of the signal output by the variable gain amplifier VGA). Because the internal noise of the VGA amplifier stage does not depend on the signal amplitude, the signal to noise ratio (SNR) is diminished under these operating conditions.
Traditionally, all these systems or read channels implement pre-equalization, though partial, by modifying the transfer function of the low pass filter LPF. This is done by programming the boost through the DAC_BOOST block and the cut-off frequency trough the DAC_FC block, as shown in FIG.
2
.
SUMMARY OF THE INVENTION
It has now been found that it is possible to prevent a reduction of the signal to noise ratio (SNR) even for those applications requiring a significant increment of the boost of the transfer function of the low pass filter. This is done by avoiding incrementation of the gain for high frequency harmonic components, while attenuating the low frequencies for modifying the spectrum of the signal originating from the read heads. In this way, by not reducing the amplitude of the signal output by the VGA amplifier stage as in traditional systems, to compensate for the reduced gain in the low pass filter band, a net improvement of the signal to noise ratio is obtained. In practice, this is obtained by modifying the profile of the transfer function profile of the low pass filter.


REFERENCES:
patent: 5235540 (1993-08-01), DeVierman
patent: 5682125 (1997-10-01), Minuhin et al.
patent: 5684651 (1997-11-01), Yaegashi et al.
patent: 6067198 (2000-05-01), Zuffada et al.
patent: 6141168 (2000-10-01), Takahashi et al.
patent: 0961269 (1999-01-01), None
Krause, Solid State Radio Engineering, 1980, pp. 28-29. USA XP002078791, John Wiley & Sons.

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