Reactive ion etching buffer mask

Details Reactive ion etching buffer mask Reactive ion etching buffer mask

1992-10-08

1994-03-29

Carroll, J.

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

Groove

257301, 257534, 257798, H01L 2968, H01L 2906, H01L 2904

Patent

active

052987906

ABSTRACT:
An improved mask and method of forming a deep and width trench in a substrate and the resulting structure is disclosed. A substrate material such as silicon has deposited thereon a first layer of sacrificial material as a first component of an etch mask, the sacrificial material being a material such as polysilicon that is either etched by or absorbs the same ions which reactively ion etch the substrate. A second layer of material, which resists reactive ion etching, such as silicon dioxide, is deposited over the first layer of material as a second component of the etch mask. The silicon dioxide is patterned in the form of the trench to be formed in the substrate. The layer polysilicon material is then reactive ion etched and the reactive ion etching continued to form a trench in the silicon substrate. The polysilicon acts as a sacrificial material being etched by any ions that are reflected from the silicon dioxide or are directed at an angle such that they strike the layer of polysilicon material. Thus, only those ions which are directed essentially normal to the underlying substrate perform the trench etching. This allows the trench to have essentially straight side walls and to be of essentially uniform width.

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B. M. Kemlage et al., "Fabrication of oxide isolation using an oxynitride/polysilicon mask", IBM Technical Disclosure Bulletin, vol. 24, No. 9, (Feb. 1982) p. 4756.
Narrow Width Effects of Shallow Trench-Isolated CMOS with n+-Polysilicon Gate; IEEE Transaction on Electron Devices; Jun. 1989; vol. 36, No. 6, pp. 1110-1116.
Trench Framing Recessed Oxide Isolation; IBM/IBM Technical Disclosure Bulletin; Apr. 1982, vol. 24, No. 118; pp. 5993-5994.

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