Re-timing and up-sampling a sub-sampled user data signal...

Details Re-timing and up-sampling a sub-sampled user data signal... Re-timing and up-sampling a sub-sampled user data signal...

1999-07-13

2002-05-28

Tran, Thang V. (Department: 2651)

Dynamic information storage or retrieval

Binary pulse train information signal

Including sampling or a/d converting

C369S124050, C360S051000

Reexamination Certificate

active

06396788

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention is related to the field of optical disk systems, and in particular, to optical disk systems and circuitry that re-time and up-sample a sub-sampled user data signal using a digital feedback loop.
2. Statement of the Problem
FIG. 1
depicts a conventional optical disk system
100
that is comprised of an optical disk device
101
and a read channel
102
. The optical disk device
101
stores user data
103
on an optical disk
104
, and also includes an optical pickup
105
. The read channel
102
comprises an amplifier and filter
106
, an analog-to-digital converter
107
, an equalizer
108
, a re-timer
109
, a detector
110
, and a decoder
111
. In operation, the optical pickup
105
obtains a signal
113
from the optical disk
104
. The signal
113
represents physical transitions that encode the user data
103
on the optical disk
104
. The optical pickup
105
provides a corresponding analog signal
114
to the amplifier and filter
106
. The amplifier and filter
106
amplifies and filters the analog signal
114
to provide the amplified-filtered analog signal
115
to the analog-to-digital converter
107
.
The analog-to-digital converter
107
samples the analog signal
115
to generate a sampled signal
116
. The sampling rate is greater than 1/T where T is the is the bit period for the bits on the optical disk
104
that encode the user data
103
. In other words, the analog signal
115
is sampled at least once for each encoded bit on the optical disk
104
. The analog-to-digital converter
107
provides the sampled signal
116
to the equalizer
108
. The equalizer
108
processes the sampled signal
116
to provide an equalized-sampled signal
117
to the re-timer
109
.
The re-timer
109
processes the signal
117
to move samples to times expected by the detector
110
. The re-timer
109
provides a re-timed signal
118
to the detector
110
. The detector
110
identifies encoded bits from the re-timed signal
118
to generate an encoded signal
119
for the decoder
111
. The decoder
111
derives the data signal
120
from the encoded signal
119
. The data signal
120
carries user data
112
that should replicate the user data
103
on the optical disk
104
.
FIG. 2
depicts the conventional re-timer
109
from FIG.
1
. The re-timer
109
is comprised of adder
221
, re-timing interpolator
222
, moving average filter
223
, error detector
224
, loop filter
225
, digital controlled oscillator
226
, and asymmetry control
227
. In operation, the adder
221
receives the equalized-sampled signal
117
and adds in an asymmetry control signal
234
to adjust the symmetry of the samples above and below a horizontal axis representing a zero crossing. The adder
221
provides the resulting sampled signal
228
to the re-timing interpolator
222
.
The re-timing interpolator
222
adjusts the timing of the samples by moving samples based on the phase control signal
232
from the digital controlled oscillator
226
. The samples are placed at approximate times when samples are expected by the detector
110
, although these times are later adjusted by the moving average filter
223
. The re-timing interpolator
222
provides the re-timed signal
229
to both the moving average filter
223
and to the error detector
224
. The moving average filter
223
suppresses interpolation error by averaging the consecutive samples in the re-timed signal
229
. This final adjustment by the moving average filter
223
should be taken into account when calculating the phase control signal
232
that is used by the re-timing interpolator
222
to move samples.
The error detector
224
processes the re-timed signal
229
to generate a phase error signal
230
and an asymmetry error signal
233
. To calculate these errors, the error detector
224
uses a slicer to detect zero crossings and adds the phase of the two samples on either side of the zero crossing. For phase error calculation, negative results are flipped to positive. The asymmetry control
227
receives and processes the asymmetry error signal
233
to produce the asymmetry control signal
234
that is added to the signal
117
to adjust the symmetry of the samples above and below the zero crossing axis.
The phase error signal
230
is provided to the loop filter
225
. The loop filter
225
filters the phase error signal
230
to stabilize the phase error feedback loop by producing a phase error signal
231
for the digital controlled oscillator
226
. The digital controlled oscillator
226
processes the phase error signal
231
to generate the phase control signal
232
for the re-timing interpolator
222
. The phase control signal
232
indicates the number of samples in the sampled signal
228
from the current sample to the last sample before a sample is expected by the detector
110
. The phase control signal also indicates the phase from this last sample to the time of the expected sample for the detector
110
.
Unfortunately, the conventional re-timer
109
must receive a sampled signal that has been sampled at a rate greater than 1/T where T is the bit period of the bits on the optical disk that encode the user data. The conventional re-timer
109
is unable to process a sub-sampled signal through up-sampling. A sub-sampled signal is sampled at a lower rate than 1/T, for example at 1/2T. The ability to process a sub-sampled signal at 1/2T would effectively double the speed of the optical disk system
100
.
Unfortunately, the conventional receiver circuitry
302
does not use rules based on user data encoding to better control both asymmetry and phase errors. Without these rules, bad asymmetry and phase error calculations are allowed into the feedback control loops. More intelligent handling of bad error data would improve the accuracy and speed of the feedback control loops.
Unfortunately, the conventional receiver circuitry
302
cannot process consecutive samples in parallel. This inhibits the use of CMOS technology that produces cheaper and faster circuitry. CMOS circuitry would improve the speed of the re-timing and up-sampling, as well as the feedback control loops.
FIG. 3
depicts another conventional optical disk system
300
that is comprised of an optical disk device
301
and receiver circuitry
302
. The receiver circuitry
302
comprises a filter
306
, an analog-to-digital converter
307
, an interpolator
322
, a symbol detector
310
, a decoder
311
, a phase detector
324
, a loop filter
325
, and a voltage controlled oscillator
326
. In operation, the optical disk device
301
provides an analog signal
314
representing encoded user data to the filter
306
. The filter
306
filters the analog signal
314
to provide a filtered analog signal
315
to the analog-to-digital converter
307
. The analog-to-digital converter
307
sub-samples the analog signal
115
using the control signal
332
to generate a sub-sampled signal
116
. The sub-sampling rate is 1/2T where T is the bit period for the bits that encode the user data. In other words, the-analog signal
315
is sampled once for every two encoded bits on the optical disk device
301
. The analog-to-digital converter
307
provides the sub-sampled signal
316
to the interpolator
322
.
The interpolator
322
up-samples the sub-sampled signal
316
by adding an estimated sample in between each of the sub-samples to produce an up-sampled signal
329
. The symbol detector
310
identifies encoded symbols from the up-sampled signal
329
to generate an encoded signal
319
for the decoder
311
. The decoder
311
derives the data signal
320
from the encoded signal
319
. The data signal
320
carries user data
312
that should replicate the user data on the optical disk device
301
.
The phase detector
324
processes the up-sampled signal
329
to provide a phase error signal
330
to the loop filter
325
. The phase error signal
330
indicates the phase error between the samples in the estimated sampled signal
329
and the phase expected by the symbol detector

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