Re-synchronization of independently-clocked audio streams by dyn

Coded data generation or conversion – Digital code to digital code converters – Data rate conversion

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Details

36472401, H03M 700, G06F 710

Patent

active

060577894

ABSTRACT:
A sample-rate converter has a FIFO for buffering input samples. The FIFO is written with an input sample by an input clock synchronized to the input audio stream. The samples are read from the FIFO by a derived clock. The derived clock is generated from an output clock using a nominal ratio of Q/P. Read and write counters for the FIFO are compared. When the write counter is ahead of the read counter by exactly a target amount the derived clock is a ratio of Q/P of the output clock. When the write counter is ahead of the read counter by more than the target, the read rate is increased by accelerating the derived clock to a ratio of (Q+1)/P. When the write counter is ahead of the read counter by less than the target amount, the read rate is decreased by slowing the derived clock to a ratio of (Q-1)/P. An accumulator generates the derived clock by adding Q, Q+1, or Q-1 for each output-clock pulse. Each derived-clock pulse reduces the accumulator by P. The accumulator value is used to select one group of L coefficients in a set of P groups to apply to a convolution FIR filter that generates the output sample from L input samples stored from the FIFO in a shift register.

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Smith and Gossett, "A Flexible Sampling-Rate Conversion Method", Proceedings of the Int'l Conf. on Acoustics, Speech, and Signal Processing, San Diego, vol. 2, (New York), pp. 19.4.1-19.4.2, IEEE Press, Mar. 1984.

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