Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
1999-04-30
2001-03-27
Lee, Eddie C. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S532000, C257S535000, C257S536000, C257S528000, C438S329000, C438S382000, C438S957000
Reexamination Certificate
active
06208009
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is related to U.S. patent applications entitled Semiconductor Device And Method Of Forming A Semiconductor Structure To Provide Electrostatic Discharge Protection and Semiconductor Structure and Zener Diode And RC Network Combination Semiconductor Device For Use In Integrated Circuits and Method Therefor, which are filed concurrently with the present U.S. patent application. The present U.S. patent application and the related applications are assigned to the same assignee.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor devices and to the fabrication of semiconductor devices, and more specifically, this invention relates to RC-Networks in semiconductor devices and to a fabrication method for semiconductor devices comprising Resistor-Capacitor (RC) networks. Variations of semiconductor devices comprising RC networks include devices such as Resistor-Capacitor-Diode (RCD) networks and Resistor-Capacitor-Inductor (RCL) networks.
2. Description of the Related Art
In the prior art, certain methods of improving the electrical conductivity of capacitor electrodes in semiconductor devices using thin film polysilicon plates have been disclosed. One such approach may be found in Tung et al. (Tung) U.S. Pat. No. 5,682,060 issued on Oct. 28, 1997. Tung discloses a process for fabricating a capacitor component in a semiconductor device which is comprised of a bottom doped polysilicon plate, a dielectric layer, typically oxide or oxide
itride/oxide (ONO), and a top doped polysilicon plate.
Following the deposition and doping of the top polysilicon plate, a layer of metal silicide, preferably titanium silicide, is formed on the top doped polysilicon plate. The titanium silicide layer is formed when the device is heated to a temperature of 675 deg. C. for a period of 30 minutes after a layer of titanium is deposited on the top doped polysilicon layer. The result is the formation of titanium silicide over the top doped polysilicon plate thereby improving the electrical conductivity of the top plate. The unreacted titanium is removed by a chemical process well known in the art. Fabrication of the remainder of the device including isolation layers and metal contacts may then be completed.
The disadvantages of the above described Tung patented method are the time and cost involved with the thermal or heating process to produce the titanium silicide. There may also be process inconsistencies or incompatibilities with the metal silicide formation approach resulting in electrical anomalies across the numerous devices typically fabricated in a single integrated circuit type of silicon wafer.
Other methods which use tantalum nitride or other types of nitride for a resistive layer have the very severe problem of nitrogen contamination of the capacitor electrodes, the metal contacts to the capacitor electrodes and/or the metal interconnect layer or layers. Nitrogen contamination results, for example, in instability in the capacitive devices.
Therefore, a solution to the above described limitations imposed by nitrogen contamination found in the prior art and by the metal silicide prior art method for fabricating capacitors to be used in an integrated circuit using semiconductor devices was needed, particularly for those semiconductor devices or integrating circuits incorporating RC networks.
BRIEF SUMMARY OF THE INVENTION
It is an object of the present invention to provide an improved RC network semiconductor device which has a simplified structure and improved method therefor.
It is another object of the present invention to provide an improved RC network semiconductor device which may be manufactured by reducing the number of thermal or heating processes required and an improved method therefor.
It is still another object of the present invention to provide an improved RC network semiconductor device which is more reliable and less costly to manufacture and an improved method therefor.
It is a further object of the present invention to provide an RC network semiconductor device which reduces the instability caused by contaminating the metal interconnect layer with nitrogen from the deposition of a resistive layer of tantalum nitride by forming a protective metal layer between the metal interconnect layer and the tantalum nitride resistive layer and an improved method therefor.
It is a still further object of the present invention to provide an improved RC network semiconductor device which uses a dielectric layer comprising silicon nitride between capacitor electrodes and an improved method therefor.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular, description of the preferred embodiments of the invention, as illustrated in the accompanying drawings.
BRIEF DESCRIPTION OF THE PREFERRED EMBODIMENTS
In accordance with one embodiment of this invention, a integrated circuit semiconductor device is provided which comprises, in combination, at least one capacitor device and at least one resistor device: a semiconductor substrate; a capacitor device having one electrode spaced from the substrate, a second electrode of the capacitor device comprises a heavily doped semiconductor region, the capacitor device having a dielectric layer located between the one electrode and second electrode; and a resistor device spaced further away from the substrate than the capacitor device, the resistor device comprising a layer portion of resistive material, protective metal layer portions located on an exposed surface portion of the layer of resistive material and spaced apart metal contacts in electrical contact with spaced apart portions of the resistive material through electrical contact with intermediate spaced apart portions of the protective metal layer that cover the spaced apart portions of the resistive material.
In accordance with another embodiment of this invention, a method is disclosed of forming an integrated circuit semiconductor device which comprises, at least one capacitor device and at least one resistor device which method comprises the steps of: providing a semiconductor substrate; forming a capacitor device having one electrode spaced from the substrate, a second electrode of the capacitor device comprises a heavily doped semiconductor region, the capacitor device having a dielectric layer located between the one electrode and second electrode; and forming a resistor device spaced further away from the substrate than the capacitor device, the resistor device comprising a layer portion of resistive material, protective metal layer portions located on an exposed surface portion of the layer of resistive material and spaced apart metal contacts in electrical contact with spaced apart portions of the resistive material through electrical contact with intermediate spaced apart portions of the protective metal layer that cover the spaced apart portions of the resistive material.
REFERENCES:
patent: 3781610 (1973-12-01), Bodway
patent: 4866502 (1989-09-01), Tomaszewski
patent: 5268315 (1993-12-01), Prasad et al.
patent: 5541442 (1996-07-01), Keil
patent: 5652460 (1997-07-01), Kalb et al.
patent: 5670819 (1997-09-01), Yamaguchi
patent: 5682060 (1997-10-01), Tung
patent: WO 96/36993 (1996-11-01), None
Khrustalev Vladimir A.
Kravtchenko Dmitri G.
Digital Devices, Inc.
Fenty Jesse A.
Lee Eddie C.
Moy Jeffrey D.
Weiss Jeffrey
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