Rational frequency synthesizers

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

Reexamination Certificate

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C331S00100A, C331S016000

Reexamination Certificate

active

06977556

ABSTRACT:
A single loop PLL frequency synthesizer for operation in the MHz to GHz range, suitable for integration in integrated circuits, operates at high comparison frequencies thus achieving superior phase noise performance, having wide loop bandwidths while able to tune in small frequency steps. It is based on the fact that the output frequency and the reference clock frequency always have a rational relationship, and so can always be represented as a ratio of two integer numbers. This ratio is expanded into various expressions of equivalent fraction expansions taking the form of a series of divided, added or subtracted terms, each being a rational number in itself. This ratio is realized in hardware through stages of frequency conversions using single sideband mixers (either the upper or lower sideband, and frequency dividers. This process of frequency translation thus generates the comparison frequency to which the PLL phase-locks the VCO.

REFERENCES:
patent: 4573023 (1986-02-01), Cok et al.

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