Ratiometric A/D converter with non-rationometric error offset

Details Ratiometric A/D converter with non-rationometric error offset Ratiometric A/D converter with non-rationometric error offset

1991-06-21

1992-12-15

Pellinen, A. D.

Coded data generation or conversion

Converter compensation

341120, H03M 106

Patent

active

051721155

ABSTRACT:
A ratiometric converter is provided that is comprised of a dual converter system utilizing a first converter (36) and a second converter (38). The second converter (38) is operable to receive the input voltage from a load cell (10) on sense lines (12) and (14) and compare them with an internal reference. Similarly, the first A/D converter (36) is operable to receive the reference voltage to the load cell (10) and compare it with the internal reference. The output of each of the converters (36) and (38) is then input to subtraction circuits (78) and (84), respectively, in the digital domain. In a calibration mode, switches (72) and (73) shorts the reference nodes in the load cell (10) together to determine the non-ratiometric offsets., These offsets are then stored in registers (80) and (86) for the reference voltage and the input voltage, respectively. During operation, the offsets are then input to the subtraction blocks (78) and 84) and a digital subtraction performed on the output of both converters (36) and (38). The output of the subtraction blocks (78) and (84) are then input to a ratiometric operator block (52) to perform a digital division thereon. This results in a ratiometric output that has the non-ratiometric offsets removed. Thereafter, the signal is input to a system calibration block (32) to remove ratiometric errors.

REFERENCES:
patent: 4063236 (1977-12-01), Amemiya et al.
patent: 4243975 (1981-01-01), Masuda et al.
patent: 4943807 (1990-07-01), Early et al.

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