Rate n(n+1) code for embedded servo address encoding

Details Rate n(n+1) code for embedded servo address encoding Rate n(n+1) code for embedded servo address encoding

1995-07-14

1999-09-07

Young, Brian

Coded data generation or conversion

Digital code to digital code converters

To or from 'n' out of 'm' codes

H03M 720

Patent

active

059493585

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The present invention relates to encoding and decoding of track address patterns in data storage systems, and more particularly, to an encoded Gray-coded track address pattern used with computer disk drive systems.
A magnetic disc, such as a hard disc apparatus or a floppy disc apparatus, is used as a data storage and retrieval medium for a computer. Data is stored in ("written to") and retrieved ("read") from the magnetic disc in a magnetic recording device using a "read/write" magnetic transducer or "head" positioned adjacent the magnetic disc as it rotates. The magnetic disc is divided into concentric tracks along radial directions across the disc. The magnetic disc is also divided into angular sectors between selected radii of the disc. The storage or retrieval region of the magnetic disc is specified by the track number (track address) and the sector number. The sectors are further divided into a servo zone which provide positioning information for the read/write magnetic head and a normal data zone where binary data is stored. The positioning information in the servo zones includes a track address for coarse positioning of the magnetic head, and a burst pattern for fine positioning of the magnetic head, or the like.
Each track, T, on the magnetic disk has a unique address or identification number which can be represented by a Gray-code binary bit sequence address pattern, G.sub.T, of a certain bit length using the well known Gray-coding scheme. The address pattern G.sub.T of a track T is recoded into a longer operational binary bit sequence pattern, E.sub.T, which is written as the address of that track in, for example, a servo zone of the magnetic disc. The objective of recoding the Gray-code address pattern G.sub.T into the operational code track address pattern E.sub.T is to generate an E.sub.T pattern which the magnetic recording device can detect and recognize more reliably than the G.sub.T pattern. The ratio of the bit count length of the G.sub.T pattern to the bit count length of the E.sub.T pattern is called the rate of the code. The higher the rate, the more efficient is the code.
The recording techniques described in the prior art do not achieve the maximum possible efficiency represented by an n/(n+1) rate track address code, where n.gtoreq.2. In fact, the typical rate achieved in the prior art for such recordings is 1/2 for all values of n, because the usual method for encoding track addresses is to provide two bits therein for each Gray-code track address bit to assure a flux reversal is obtained for each Gray-ode bit in the servo zone storage of the track addresses. However, U.S. Pat. No. 5,274,510 does teach a method that converts a G.sub.T pattern of length "n" into an E.sub.T pattern of length "n+2" for a code rate of n/(n+2). Nonetheless this is still not the most efficient track address code rate possible.


SUMMARY OF THE INVENTION

The present invention provides a track address pattern embedded in a storage medium in a portion of a track therein for representing a track address identification having a binary bit length "n". The track address pattern embedded in the medium is recoded from a Gray-code representation of the track address identification and has a binary bit length of "n+1" so as to provide, among other things, a code of rate n/(n+1), where n.gtoreq.2. The encoded track address pattern (or codeword) is modeled from a Gray-code wherein a plurality of bit cells corresponding to a track address of the data storage apparatus are recoded to include a parity bit selected to maintain a selected parity for the track address pattern.
Another aspect of the invention is to provide an embedded track address pattern recoded from a Gray-code representation of the track address identification to include one parity bit, X, positioned in the interior of the track address pattern and selected to maintain a selected parity for the embedded track address pattern.
The embedded track address pattern further provides that when a "1" occurs in the same bit locati

REFERENCES:
patent: 5270878 (1993-12-01), Kaida et al.
patent: 5274510 (1993-12-01), Sugita et al.
patent: 5737142 (1998-04-01), Zook
IBM Technical Disclosure Bulletin, Jul. 1982, vol. 25, No. 2, pp. 776-777.

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