Raster graphics display refresh memory architecture offering rap

Details Raster graphics display refresh memory architecture offering rap Raster graphics display refresh memory architecture offering rap

1982-02-12

1985-10-08

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1520

Patent

active

045464510

ABSTRACT:
A raster graphic refresh memory architecture offering increased access speed. The memory takes advantage of the "page mode" of operation of dynamic random-access memory integrated circuit devices which require two separate device addresses for random access to a storage location therein but permit in "page mode" a first address corresponding to a set of storage locations to be maintained while changing the second address for more rapid access. The memory is organized so that a portion of the second device address is allocated to the least significant bits of one dimension of the display address and another portion of the second device is allocated to the least significant bits of another dimension of the display address, thereby forming a two-dimensional cell of storage locations on a single page corresponding to a region on the display. The page can be extended by using a plurality of random-access memory devices and selecting one of the devices using the least significant bits of one dimension of the display address. An addressing scheme is provided which permits simultaneous "page mode" writing of data into multiple storage locations representing contiguous pixels of the display. A mechanism is also provided for reading back data from a plurality of storage locations representing contiguous pixels on the display and storing the data in a temporary storage-shift register for subsequent manipulation.

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