1993-11-29
1997-05-27
Davis, George B.
395 21, 395 22, 395 23, 395 27, G06F 1518
Patent
active
056340877
ABSTRACT:
An apparatus and methods characterized by an electric neural network including a node having multipliers respectively receiving signals representing feature vector elements and signals representing weight vector elements to produce product signals, a summer to add the product signals with a bias signal and output a sum signal to a hard limiter, the hard limiter for outputting a preliminary output signal of polarity. In response to the output signal of polarity, one of at least two logic branches is enabled. In response to such enabling, weight elements are assigned to a next weight vector to be used in subsequent processing by the one of the at least two logic branches until a label is to be produced.
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Farrell Kevin R.
Mammone Richard J.
Sankar Ananth
Davis George B.
Rutgers University
Trzyna Peter K.
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