Rapid thermal processing system for integrated circuits

Electric heating – Heating devices – Combined with container – enclosure – or support for material...

Reexamination Certificate

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Details

C219S390000, C219S405000, C392S416000, C392S418000, C118S724000, C118S725000, C118S050100

Reexamination Certificate

active

06707011

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to the manufacture of integrated circuits. Specifically, a system for heating semiconductor substrates in a controlled pressure and temperature environment is disclosed.
The manufacture of integrated circuits, such as metal oxide semiconductors (MOS), requires rapid thermal processing of semiconductor wafers in a controlled pressure environment, such as vacuum. For instance, in the process of forming MOS transistors, the gate oxide layer is typically formed by thermal oxidation of a silicon substrate in a substantially pure oxygen atmosphere. However, in certain applications such as MOS ULSI circuits, the gate oxide layers can exhibit undesirable characteristics, such as relatively high defect densities and charge trapping, along with relatively low reliability and resistance problems due to hot carrier effects.
It is known that the gate dielectric characteristics of MOS transistors can be improved using a sequence of rapid thermal processing (RTP) of the silicon substrate. These processing steps include: (1) creating an oxynitride growth with nitric oxide (NO); (2) applying silicon nitride (SiN) with a chemical vapor deposition (CVD) process; (3) annealing with ammonia (NH
3
); and (4) annealing with N
2
O. The various RTP processing steps are conducted generally in a vacuum capable chamber with a controlled pressure/vacuum and a controlled temperature. An RTP oven is partitioned with quartz windows defining a central vacuum chamber that holds a wafer to be heated by multiple arrays of radiant heating lamps. The quartz windows separate the wafers from heating lamps and other sources of contaminants during the heating process. The edges of the quartz windows are sealed with the chamber walls to form an air-tight chamber enclosure. When a vacuum is drawn in the chamber, an atmospheric force between two and four tons is produced against the quartz windows. The quartz windows are thick enough to withstand this force, and are generally at least about 25 mm to 35 mm thick. Thinner quartz windows, generally at least about 3 mm to 6 mm thick, are used only for chambers that operate at atmospheric pressures.
The quartz window isolation chamber structure, while maintaining the inner chamber environment clean of contaminants, introduces a large thermal mass between the heating source (lamps) and the wafer within the chamber, making heating less efficient and wafer temperature control more difficult. The additional thermal mass makes it difficult to maintain process repeatability and quality control. The quartz windows, due to their thickness, are subject to breakage, and add significant cost to the RTP apparatus. Accordingly, a system for rapid thermal processing which avoids the complications, expense, and repeatability problems created by quartz window-based ovens would be desirable.
Moreover, efforts to increase throughput for semiconductor wafer RTP processing have yielded certain alternatives other than lamp-based heating. Mattson Technology offers an ASPEN II RTP system that processes two wafers in a single process chamber using susceptor-based heating. U.S. Pat. No. 6,133,550 discloses a method for RTP processing wafers by rapidly inserting and removing them from a furnace. Increasing wafer size and increasing stresses on larger and larger chamber windows for chambers to accommodate larger wafers have limited the potential for increasing throughput for lamp-based RTP systems by processing multiple wafers in a chamber. Accordingly, a system for lamp-based rapid thermal processing that permits increased wafer throughput would also be desirable.
Rapid thermal processing has been used to anneal semiconductor substrates following ion implantation. In a typical rapid spike anneal, the substrate is heated to 1100° C. (in the case of silicon semiconductor wafers) at a rate of from 200° to 300° per second. Once the surface has reached the peak anneal temperature, it is cooled at rates on the order of 80° C. per second. The slower the rate of cooling, the greater the migration of the implanted species following the anneal. For example, a bare silicon wafer implanted with boron (BF
2
+
) to a depth of about 240 Å and spike annealed at a maximum temperature of 1050° C. exhibits migration of the junction depth as a function of the ramp down rate used following the spike temperature. When cooled at a rate of between 80° C. to 120° C. per second, the junction depth increases to over 300 Å. As shallower and shallower junction depths are sought, the adverse effects of junction depth migration during treatment become more and more critical.
One factor limiting the rate at which the temperature of the semiconductor substrate surface may be cooled is the residual heating as a result of lamp filament emitting radiation following lamp shut off, which residual radiation can pass through the lamp bulb envelope or enclosure and into the chamber and reach the substrate. Because the lamp filament remains hot for fraction of a second (generally 100 to 1000 msec), the radiation still emitted from the filament delays the start of controlled cool down or ramp down. Accordingly, a better way to expedite temperature ramp down following heating in rapid thermal processing is sought.
SUMMARY OF THE INVENTION
The rapid thermal processing (RTP) system according to the invention provides a controlled pressure and temperature environment for processing substrates, such as semiconductor wafers and integrated circuits. The apparatus includes a heating chamber and an array of heat lamps that generate radiant heat for maintaining the temperature of a semiconductor wafer held within the chamber at a selected value or range of values according to a desired heating recipe. Each heat lamp includes a bulb, and at least such bulb is surrounded by an optically transparent enclosure that isolates the bulb from the interior of the chamber and the wafer therein. Preferably, the optically transparent enclosure is formed from quartz and has a surface completely or substantially transparent to the radiant heat energy emitted by the bulb. By isolating the chamber interior and the wafer therein from the bulb and associated components of the heating lamp, the optically transparent enclosure helps prevent contaminants from the heating lamps from entering the chamber or being deposited on a semiconductor wafer in the chamber.
In another aspect of the invention, improved temperature control is realized by using heat lamps with bulbs having a reflector surface disposed over at least a portion of the bulb surface or disposed over at least a portion of the optically transparent enclosure. The reflectors help to control and direct radiation from the lamps to the surface of a semiconductor wafer under process. Alternatively, the reflector surface may be found on the wall of the chamber, particularly within a cavity in the chamber wall with a concavely-shaped or parabolic-shaped inner surface. When the heat lamps are positioned within the cavity, the reflector surface on the cavity wall helps to control and direct radiation from the lamps to the surface of a semiconductor wafer under process.
In yet another aspect of the invention, an apparatus for rapid thermal processing of a semiconductor substrate, such as a semiconductor wafer, or a system for processing one or multiple semiconductor substrates, has a chamber defining a volume into which the semiconductor substrate is introduced for heating by one or more heating lamps. Preferably each heating lamp is isolated from the chamber volume by an optically transparent envelope that has an associated reflector. The envelope may be rotated about its longitudinal axis from a first position in which the reflector directs radiant heat energy emitted by the heating lamp toward the substrate to a second position wherein the reflector shields the substrate from a portion or all of the radiant heat emitted by the heating lamp. The rotation of the envelope may be accomplished independently or together with rotation of the lamp bulb.

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