Pulse or digital communications – Spread spectrum – Direct sequence
Reexamination Certificate
2000-11-22
2004-06-29
Phu, Phoung (Department: 2631)
Pulse or digital communications
Spread spectrum
Direct sequence
C375S150000
Reexamination Certificate
active
06757323
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related generally to nonsinusoidal spread spectrum radio communication systems, and more particularly to signal acquisition by nonsinusoidal spread spectrum radio transceivers.
BACKGROUND OF THE INVENTION
In contrast with traditional sinusoidal-carrier radio communication systems where the transmitted electromagnetic power is concentrated in a narrow frequency band, in spread spectrum communication systems the power is distributed over a relatively large bandwidth. Spread spectrum radio communications are used in place of traditional systems to circumvent communications jamming by interference signals, prevent detection and interception by unwanted receivers so as to provide privacy, provide tolerance to multipath transmissions, send multiple independent signals over a frequency band, and/or provide accurate ranging information.
Nonsinusoidal spread spectrum (NSS) transmissions a(t) relevant to the present invention are of the form
a
(
t
)=&PSgr;(
t
)*
d
(
t
), (1.1)
where t is time, d(t) is a data function with data values of positive and negative unity where the data values of the data function d(t) have a bit width t
s
, and &PSgr;(t) is a pseudorandom code sequence consisting of a repeated series of a pseudorandom code &PHgr;(t) of length t
s
, i.e.,
&PSgr;(
t
)=&PHgr;(
t
mod
t
s
), (1.2)
where the pseudorandom code &PHgr;(t) has a value of zero for t<0 and t>t
s
. The data function d(t) changes value at integer multiples of t
s
, and one bit of data from d(t) is therefore encoded on each repetition of the pseudorandom code &PHgr;(t).
An exemplary NSS transmission a(t) based on a pseudorandom code &PHgr;(t) having a length of seven bits is shown in FIG.
1
A. The first five bits of the data function d(t) are (1, −1, 1, 1, −1, . . . ) and the pseudorandom code &PHgr;(t) consists of the bits (1, 1, 1, −1, 1, −1, −1). Therefore, as shown in
FIG. 1A
, the product of the data function d(t) and the pseudorandom code sequence &PSgr;(t), which consists of bits (1, 1, 1, −1, 1, −1, −1, 1, 1, 1, −1, 1, −1, −1, . . . ), is the transmission a(t) consisting of bits (1, 1, 1, −1, 1, −1, −1, −1, −1, −1, 1, −1, 1, 1, 1, 1, 1, −1, 1, −1, −1, 1, 1, 1, −1, 1, −1, −1, . . . ).
The cross-correlation &Lgr;(t) between a first function A(t) and a second function B(t) is given by
Λ
A
,
B
(
t
)
=
∫
-
∞
∞
A
(
τ
-
t
)
*
B
(
τ
)
ⅆ
τ
.
(
1.3
)
When the first function A is the same as the second function B, the above equation provides the autocorrelation &Lgr;
A
(t), i.e.,
Λ
A
(
t
)
=
∫
-
∞
∞
A
(
τ
-
t
)
*
A
(
τ
)
ⅆ
τ
.
(
1.4
)
If the first function A(t) and the second function B(t) are both periodic with period T, then the cross-correlation &Lgr;
A,B
(t) and the autocorrelation &Lgr;
A
also are periodic with period T, i.e.,
&Lgr;
A,B
(
t
)=&Lgr;
A,B
(
t
mod
T
), (1.5)
and
&Lgr;
A
(t)=&Lgr;
A
(
t
mod
T
). (1.6)
Therefore, if the first and second functions A(t) and B(t) have period T, the integration used to determine the correlation function may be performed over a time t of length T and then normalized, and the starting time for an integration over a time t of length T is immaterial.
If the functions A(t) and B(t) are actually bit sequences &agr;(i) and &bgr;(i) of length N bits, with each bit having a bit length of &Dgr;t, then
&Lgr;
A,B
(
n&Dgr;t
)=&pgr;
&agr;&bgr;
(
n
)&Dgr;t, (1.7)
where &lgr;
&agr;&bgr;
is the discrete cross-correlation given by
λ
α
,
β
(
n
)
=
∑
i
=
1
N
α
(
i
-
n
)
*
β
(
i
)
,
(
1.8
)
where i and n are integers. Similarly, if the function A(t) is a bit sequence &agr;(i) of length N, with each bit having a bit length of &Dgr;t, then
&Lgr;
A
(
n&Dgr;t
)=&lgr;
&agr;
(
n
)&Dgr;
t,
(1.9)
where &lgr;
&agr;
is the discrete autocorrelation given by
λ
α
(
n
)
=
∑
i
=
1
N
α
(
i
-
n
)
*
α
(
i
)
.
(
1.10
)
For example, consider the discrete autocorrelation &lgr;
&agr;
for the five-bit sequence &agr;={1, −1, −1, 1, −1}. For instance, the n=1 value of the discrete autocorrelation &lgr;
&agr;
is calculated by
&lgr;
&agr;
(1)=&agr;(0)&agr;(1)+&agr;(1)&agr;(2)+&agr;(2)&agr;(3)+&agr;(3)&agr;(4)+&agr;(4)&agr;(5)=−1 −1+−1−1=−3. (1.11)
As can be shown by similar such calculations, the discrete autocorrelation &lgr;
&agr;
has values of 5, −3, 1, 1 and −3 for n equals 0, 1, 2, 3 and 4, respectively. As shown in
FIG. 2
, the continuous autocorrelation &lgr;
&Dgr;
for the corresponding function &Dgr;(t) is easily generated from the discrete autocorrelation &lgr;
&agr;
by connecting autocorrelation values at integer multiples of &Dgr;t by straight lines. It should also be noted that the continuous autocorrelation &Lgr;
A
is symmetric about t=0, and, of course, periodic with a period of T=5&Dgr;t.
A fundamental class of binary sequences which have useful autocorrelation properties is the maximal sequence class. Any maximal sequence may be generated by a linear feedback shift register (LFSR). (It is important to note that the binary bit values of unity and negative unity, which will be used in the present specification when discussing correlations and autocorrelations, may be directly translated to the binary bit values of zero and unity, which will be used in the present specification when discussing the operation of LFSR's and generating polynomials.) The exemplary LFSR
100
shown in
FIG. 3A
is a five-stage shift register consisting, from right to left, of five flip-flops
101
,
102
,
103
,
104
, and
105
. (In the present specification the convention will be that for LFSRs with an output on the right, the rightmost flip-flop will be referred to as the first flip-flop, the second-from-the-right flip-flop will be referred to as the second flip-flop, etc. For instance, the leftmost flip-flop
105
will be referred to as the fifth flip-flop
105
.) On each clock pulse, the bit value held in each of the four leftmost flip-flops
102
,
103
,
104
and
105
of the LFSR
100
is shifted one flip-flop to the right. (A clock and its connections within the LFSR
100
are not shown in
FIG. 3A.
) Therefore, on a clock pulse the bit value in the fifth flip-flop
105
is shifted into the fourth flip-flop
104
, the bit value in the fourth flip-flop
104
is shifted into the third flip-flop
103
, etc. The output
111
of the LFSR
100
is produced by the first flip-flop
101
. The input value to the fifth flip-flop
105
of the LFSR
100
is provided by a feedback loop
110
which, in the case of this particular LFSR
100
, consists of an XOR adder
121
which taps the output
113
of the third flip-flop
103
, as well as the output
111
of the first flip-flop
101
. (Although the exemplary LFSR
100
of
FIG. 3A
has only a single XOR adder
121
in the feedback loop
110
, it should be understood that, in general, an LFSR may direct taps from the outputs of any of its flip-flops to additional XOR adders in the feedback loop.) The XOR addition, which is typically notated as ‘⊕’, of two binary value inputs is equal to unity when one, and only one, of the binary value inputs is unity, and is zero otherwise, i.e., 0⊕0=0; 0⊕1=1; 1⊕1=1; and 1⊕1=0. This type of flip-flop configuration, with taps from the outputs of some or all of the flip-flops to XO
Fleming Robert Alan
Kushner Cherie Elaine
Intergral Patent Associates
Phu Phoung
Shaw Laurence J.
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